[PATCH] D18559: AMDGPU: Add a shader calling convention

Bas Nieuwenhuizen via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 29 09:26:34 PDT 2016


bnieuwenhuizen created this revision.
bnieuwenhuizen added reviewers: arsenm, tstellarAMD, nhaehnle, mareko.
bnieuwenhuizen added a subscriber: llvm-commits.
Herald added subscribers: joker.eph, arsenm, qcolombet.

This makes it possible to distinguish between mesa shaders
and other kernels even in the presence of compute shaders.

This patch depends in its current form on D18292, but only because
it also updates the newly added testcases to use the new
calling convention.

Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

http://reviews.llvm.org/D18559

Files:
  include/llvm/IR/CallingConv.h
  lib/AsmParser/LLLexer.cpp
  lib/AsmParser/LLParser.cpp
  lib/AsmParser/LLToken.h
  lib/IR/AsmWriter.cpp
  lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
  lib/Target/AMDGPU/AMDGPUCallingConv.td
  lib/Target/AMDGPU/AMDGPUSubtarget.cpp
  lib/Target/AMDGPU/AMDGPUSubtarget.h
  lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
  lib/Target/AMDGPU/R600ISelLowering.cpp
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
  lib/Target/AMDGPU/SITypeRewriter.cpp
  test/Analysis/DivergenceAnalysis/AMDGPU/kernel-args.ll
  test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
  test/CodeGen/AMDGPU/big_alu.ll
  test/CodeGen/AMDGPU/bitcast.ll
  test/CodeGen/AMDGPU/cayman-loop-bug.ll
  test/CodeGen/AMDGPU/complex-folding.ll
  test/CodeGen/AMDGPU/floor.ll
  test/CodeGen/AMDGPU/fmad.ll
  test/CodeGen/AMDGPU/fmax.ll
  test/CodeGen/AMDGPU/fmin.ll
  test/CodeGen/AMDGPU/input-mods.ll
  test/CodeGen/AMDGPU/large-alloca-graphics.ll
  test/CodeGen/AMDGPU/llvm.AMDGPU.kill.ll
  test/CodeGen/AMDGPU/llvm.SI.fs.interp.ll
  test/CodeGen/AMDGPU/llvm.SI.image.sample-masked.ll
  test/CodeGen/AMDGPU/llvm.SI.load.dword.ll
  test/CodeGen/AMDGPU/llvm.SI.sendmsg-m0.ll
  test/CodeGen/AMDGPU/llvm.SI.tbuffer.store.ll
  test/CodeGen/AMDGPU/llvm.SI.tid.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.buffer.atomic.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.format.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll
  test/CodeGen/AMDGPU/llvm.pow.ll
  test/CodeGen/AMDGPU/load-input-fold.ll
  test/CodeGen/AMDGPU/m0-spill.ll
  test/CodeGen/AMDGPU/max-literals.ll
  test/CodeGen/AMDGPU/mubuf.ll
  test/CodeGen/AMDGPU/predicate-dp4.ll
  test/CodeGen/AMDGPU/pv-packing.ll
  test/CodeGen/AMDGPU/pv.ll
  test/CodeGen/AMDGPU/r600-encoding.ll
  test/CodeGen/AMDGPU/r600-export-fix.ll
  test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  test/CodeGen/AMDGPU/r600cfg.ll
  test/CodeGen/AMDGPU/reciprocal.ll
  test/CodeGen/AMDGPU/ret.ll
  test/CodeGen/AMDGPU/ret_jump.ll
  test/CodeGen/AMDGPU/rv7x0_count3.ll
  test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll
  test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
  test/CodeGen/AMDGPU/schedule-vs-if-nested-loop.ll
  test/CodeGen/AMDGPU/sgpr-copy.ll
  test/CodeGen/AMDGPU/shared-op-cycle.ll
  test/CodeGen/AMDGPU/si-lod-bias.ll
  test/CodeGen/AMDGPU/si-scheduler.ll
  test/CodeGen/AMDGPU/si-sgpr-spill.ll
  test/CodeGen/AMDGPU/si-spill-cf.ll
  test/CodeGen/AMDGPU/smrd.ll
  test/CodeGen/AMDGPU/split-smrd.ll
  test/CodeGen/AMDGPU/swizzle-export.ll
  test/CodeGen/AMDGPU/tex-clause-antidep.ll
  test/CodeGen/AMDGPU/texture-input-merge.ll
  test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
  test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
  test/CodeGen/AMDGPU/wait.ll
  test/CodeGen/AMDGPU/wqm.ll

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