[PATCH] D18507: [AArch64] Do not lower scalar sdiv/udiv to a shifts + mul sequence when optimizing for minsize

Haicheng Wu via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 29 06:25:00 PDT 2016

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haicheng closed this revision.
haicheng added a comment.

Committed in r264606.  Thank you for reviewing this, James and Junmo.


Repository:
  rL LLVM

http://reviews.llvm.org/D18507

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