[llvm] r264684 - [WebAssembly] Remove duplicate disabling of passes

[Derek Schuff via llvm-commits]

Author: dschuff
Date: Mon Mar 28 17:52:20 2016
New Revision: 264684

URL: http://llvm.org/viewvc/llvm-project?rev=264684&view=rev
Log:
[WebAssembly] Remove duplicate disabling of passes

Also put all the disabled passes together

Modified:
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp?rev=264684&r1=264683&r2=264684&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp Mon Mar 28 17:52:20 2016
@@ -106,7 +106,6 @@ public:
   bool addILPOpts() override;
   void addPreRegAlloc() override;
   void addPostRegAlloc() override;
-  void addMachineLateOptimization() override;
   bool addGCPasses() override { return false; }
   void addPreEmitPass() override;
 };
@@ -180,15 +179,19 @@ void WebAssemblyPassConfig::addPostRegAl
   // TODO: The following CodeGen passes don't currently support code containing
   // virtual registers. Consider removing their restrictions and re-enabling
   // them.
-  //
 
   // Has no asserts of its own, but was not written to handle virtual regs.
   disablePass(&ShrinkWrapID);
   // We use our own PrologEpilogInserter which is very slightly modified to
   // tolerate virtual registers.
   disablePass(&PrologEpilogCodeInserterID);
-  // Fails with: should be run after register allocation.
+
+  // These functions all require the AllVRegsAllocated property.
   disablePass(&MachineCopyPropagationID);
+  disablePass(&PostRASchedulerID);
+  disablePass(&FuncletLayoutID);
+  disablePass(&StackMapLivenessID);
+  disablePass(&LiveDebugValuesID);
 
   if (getOptLevel() != CodeGenOpt::None) {
     // Mark registers as representing wasm's expression stack.
@@ -206,20 +209,11 @@ void WebAssemblyPassConfig::addPostRegAl
   addPass(createWebAssemblyPEI());
 }
 
-void WebAssemblyPassConfig::addMachineLateOptimization() {
-  disablePass(&MachineCopyPropagationID);
-  disablePass(&PostRASchedulerID);
-  TargetPassConfig::addMachineLateOptimization();
-}
-
 void WebAssemblyPassConfig::addPreEmitPass() {
   TargetPassConfig::addPreEmitPass();
 
   // Eliminate multiple-entry loops.
   addPass(createWebAssemblyFixIrreducibleControlFlow());
-  disablePass(&FuncletLayoutID);
-  disablePass(&StackMapLivenessID);
-  disablePass(&LiveDebugValuesID);
 
   // Put the CFG in structured form; insert BLOCK and LOOP markers.
   addPass(createWebAssemblyCFGStackify());