[PATCH] D18421: [WIP] MachineFunction Properties
Derek Schuff via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 28 09:56:52 PDT 2016
dschuff updated this revision to Diff 51801.
dschuff added a comment.
- Change interface to be more like getAnalysisUsage
- Address comments
- Add AllVRegsAllocated to MIR and convert one test
- Update the remaining MIR tests
http://reviews.llvm.org/D18421
Files:
include/llvm/CodeGen/MIRYamlMapping.h
include/llvm/CodeGen/MachineFunction.h
include/llvm/CodeGen/MachineFunctionPass.h
lib/CodeGen/FuncletLayout.cpp
lib/CodeGen/ImplicitNullChecks.cpp
lib/CodeGen/LiveDebugValues.cpp
lib/CodeGen/MIRParser/MIRParser.cpp
lib/CodeGen/MIRPrinter.cpp
lib/CodeGen/MachineCopyPropagation.cpp
lib/CodeGen/MachineFunctionPass.cpp
lib/CodeGen/PostRASchedulerList.cpp
lib/CodeGen/PrologEpilogInserter.cpp
lib/CodeGen/RegAllocBasic.cpp
lib/CodeGen/RegAllocFast.cpp
lib/CodeGen/RegAllocGreedy.cpp
lib/CodeGen/RegAllocPBQP.cpp
lib/CodeGen/StackMapLivenessAnalysis.cpp
lib/Target/NVPTX/NVPTXTargetMachine.cpp
lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
test/CodeGen/MIR/AArch64/machine-dead-copy.mir
test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir
test/CodeGen/X86/machine-copy-prop.mir
test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
test/DebugInfo/MIR/X86/live-debug-values.mir
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