[llvm] r264440 - [X86] Use "and $0" and "orl $-1" to store 0 and -1 when optimizing for minsize

Mon Mar 28 08:43:23 PDT 2016

That's an interesting idea. It would apply to r264375 too, and any 
optsize patterns as well.

I don't know if it's currently possible for the instruction selector to 
run with different settings per basic block, though.

On 03/25/2016 06:53 PM, Philip Reames wrote:
> Can you make this conditional on the frequency of the block instead of
> the flags?  In an extremely cold block, we should probably be doing this
> at O2.
>
> Philip
>
> On 03/25/2016 11:11 AM, Hans Wennborg via llvm-commits wrote:
>> Author: hans
>> Date: Fri Mar 25 13:11:31 2016
>> New Revision: 264440
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=264440&view=rev
>> Log:
>> [X86] Use "and $0" and "orl $-1" to store 0 and -1 when optimizing for
>> minsize
>>
>> 64-bit, 32-bit and 16-bit move-immediate instructions are 7, 6, and 5
>> bytes,
>> respectively, whereas and/or with 8-bit immediate is only three bytes.
>>
>> Since these instructions imply an additional memory read (which the
>> CPU could
>> elide, but we don't think it does), restrict these patterns to minsize
>> functions.
>>
>> Differential Revision: http://reviews.llvm.org/D18374
>>
>> Added:
>>      llvm/trunk/test/CodeGen/X86/store-zero-and-minus-one.ll
>> Modified:
>>      llvm/trunk/lib/Target/X86/X86InstrCompiler.td
>>      llvm/trunk/test/CodeGen/X86/tail-opts.ll
>>
>> Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=264440&r1=264439&r2=264440&view=diff
>>
>> ==============================================================================
>>
>> --- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original)
>> +++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Fri Mar 25 13:11:31
>> 2016
>> @@ -1001,6 +1001,18 @@ def ACQUIRE_MOV64rm : I<0, Pseudo, (outs
>>   // DAG Pattern Matching Rules
>>
>> //===----------------------------------------------------------------------===//
>>
>> +// Use AND/OR to store 0/-1 in memory when optimizing for minsize.
>> This saves
>> +// binary size compared to a regular MOV, but it introduces an
>> unnecessary
>> +// load, so is not suitable for regular or optsize functions.
>> +let Predicates = [OptForMinSize] in {
>> +def : Pat<(store (i16 0), addr:$dst), (AND16mi8 addr:$dst, 0)>;
>> +def : Pat<(store (i32 0), addr:$dst), (AND32mi8 addr:$dst, 0)>;
>> +def : Pat<(store (i64 0), addr:$dst), (AND64mi8 addr:$dst, 0)>;
>> +def : Pat<(store (i16 -1), addr:$dst), (OR16mi8 addr:$dst, -1)>;
>> +def : Pat<(store (i32 -1), addr:$dst), (OR32mi8 addr:$dst, -1)>;
>> +def : Pat<(store (i64 -1), addr:$dst), (OR64mi8 addr:$dst, -1)>;
>> +}
>> +
>>   // ConstantPool GlobalAddress, ExternalSymbol, and JumpTable
>>   def : Pat<(i32 (X86Wrapper tconstpool  :$dst)), (MOV32ri tconstpool
>> :$dst)>;
>>   def : Pat<(i32 (X86Wrapper tjumptable  :$dst)), (MOV32ri tjumptable
>> :$dst)>;
>>
>> Added: llvm/trunk/test/CodeGen/X86/store-zero-and-minus-one.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store-zero-and-minus-one.ll?rev=264440&view=auto
>>
>> ==============================================================================
>>
>> --- llvm/trunk/test/CodeGen/X86/store-zero-and-minus-one.ll (added)
>> +++ llvm/trunk/test/CodeGen/X86/store-zero-and-minus-one.ll Fri Mar 25
>> 13:11:31 2016
>> @@ -0,0 +1,88 @@
>> +; RUN: llc -mtriple=i686-unknown-linux-gnu %s -o - | FileCheck %s
>> --check-prefix=CHECK32 --check-prefix=CHECK
>> +; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
>> --check-prefix=CHECK64 --check-prefix=CHECK
>> +
>> +define void @zero_optsize(i32* %p) optsize {
>> +entry:
>> +  store i32 0, i32* %p
>> +  ret void
>> +
>> +; CHECK-LABEL: zero_optsize:
>> +; CHECK: movl $0
>> +; CHECK: ret
>> +}
>> +
>> +define void @minus_one_optsize(i32* %p) optsize {
>> +entry:
>> +  store i32 -1, i32* %p
>> +  ret void
>> +
>> +; CHECK-LABEL: minus_one_optsize:
>> +; CHECK: movl $-1
>> +; CHECK: ret
>> +}
>> +
>> +
>> +define void @zero_64(i64* %p) minsize {
>> +entry:
>> +  store i64 0, i64* %p
>> +  ret void
>> +
>> +; CHECK-LABEL: zero_64:
>> +; CHECK32: andl $0
>> +; CHECK32: andl $0
>> +; CHECK64: andq $0
>> +; CHECK: ret
>> +}
>> +
>> +define void @zero_32(i32* %p) minsize {
>> +entry:
>> +  store i32 0, i32* %p
>> +  ret void
>> +
>> +; CHECK-LABEL: zero_32:
>> +; CHECK: andl $0
>> +; CHECK: ret
>> +}
>> +
>> +define void @zero_16(i16* %p) minsize {
>> +entry:
>> +  store i16 0, i16* %p
>> +  ret void
>> +
>> +; CHECK-LABEL: zero_16:
>> +; CHECK: andw $0
>> +; CHECK: ret
>> +}
>> +
>> +
>> +define void @minus_one_64(i64* %p) minsize {
>> +entry:
>> +  store i64 -1, i64* %p
>> +  ret void
>> +
>> +; CHECK-LABEL: minus_one_64:
>> +; CHECK32: orl $-1
>> +; CHECK32: orl $-1
>> +; CHECK64: orq $-1
>> +; CHECK: ret
>> +}
>> +
>> +define void @minus_one_32(i32* %p) minsize {
>> +entry:
>> +  store i32 -1, i32* %p
>> +  ret void
>> +
>> +; CHECK-LABEL: minus_one_32:
>> +; CHECK: orl $-1
>> +; CHECK: ret
>> +}
>> +
>> +define void @minus_one_16(i16* %p) minsize {
>> +entry:
>> +  store i16 -1, i16* %p
>> +  ret void
>> +
>> +; CHECK-LABEL: minus_one_16:
>> +; CHECK: orw $-1
>> +; CHECK: ret
>> +}
>>
>> Modified: llvm/trunk/test/CodeGen/X86/tail-opts.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tail-opts.ll?rev=264440&r1=264439&r2=264440&view=diff
>>
>> ==============================================================================
>>
>> --- llvm/trunk/test/CodeGen/X86/tail-opts.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/tail-opts.ll Fri Mar 25 13:11:31 2016
>> @@ -376,7 +376,7 @@ return:
>>   ; CHECK-LABEL: two_minsize:
>>   ; CHECK-NOT: XYZ
>>   ; CHECK: ret
>> -; CHECK: movl $0, XYZ(%rip)
>> +; CHECK: andl $0, XYZ(%rip)
>>   ; CHECK: movl $1, XYZ(%rip)
>>   ; CHECK-NOT: XYZ
>>
>>
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