[llvm] r264465 - [X86] Emit a proper ADJCALLSTACKDOWN in EmitLoweredTLSAddr

David Majnemer via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 25 14:49:12 PDT 2016


Author: majnemer
Date: Fri Mar 25 16:49:11 2016
New Revision: 264465

URL: http://llvm.org/viewvc/llvm-project?rev=264465&view=rev
Log:
[X86] Emit a proper ADJCALLSTACKDOWN in EmitLoweredTLSAddr

We forgot to add the second machine operand to our ADJCALLSTACKDOWN,
resulting in crashes in PEI.

This fixes PR27071.

Added:
    llvm/trunk/test/CodeGen/X86/pr27071.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=264465&r1=264464&r2=264465&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Mar 25 16:49:11 2016
@@ -22987,7 +22987,7 @@ X86TargetLowering::EmitLoweredTLSAddr(Ma
   // Emit CALLSEQ_START right before the instruction.
   unsigned AdjStackDown = TII.getCallFrameSetupOpcode();
   MachineInstrBuilder CallseqStart =
-    BuildMI(MF, DL, TII.get(AdjStackDown)).addImm(0);
+    BuildMI(MF, DL, TII.get(AdjStackDown)).addImm(0).addImm(0);
   BB->insert(MachineBasicBlock::iterator(MI), CallseqStart);
 
   // Emit CALLSEQ_END right after the instruction.

Added: llvm/trunk/test/CodeGen/X86/pr27071.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr27071.ll?rev=264465&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr27071.ll (added)
+++ llvm/trunk/test/CodeGen/X86/pr27071.ll Fri Mar 25 16:49:11 2016
@@ -0,0 +1,29 @@
+; RUN: llc -relocation-model pic < %s | FileCheck %s
+target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
+target triple = "i386-unknown-freebsd"
+
+ at x1 = external thread_local global i32, align 4
+
+define void @x3() #0 {
+entry:
+  %0 = load i32, i32* @x1, align 4
+  %cond = icmp eq i32 %0, 92
+  br i1 %cond, label %sw.bb, label %sw.epilog
+
+sw.bb:                                            ; preds = %entry
+  call void @x2(i8* null)
+  unreachable
+
+sw.epilog:                                        ; preds = %entry
+  ret void
+}
+
+declare void @x2(i8*)
+
+attributes #0 = { optsize }
+
+; CHECK-LABEL: x3:
+; CHECK:         addl    $_GLOBAL_OFFSET_TABLE_+(.Ltmp4-.L0$pb), %[[REG:.*]]
+; CHECK-NEXT:    leal    x1 at TLSGD(,%[[REG]]), %eax
+; CHECK-NEXT:    calll   ___tls_get_addr at PLT
+; CHECK-NEXT:    cmpl    $92, (%eax)




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