[llvm] r264358 - CXX TLS: collect return blocks after SelectAllBasicBlocks.
Manman Ren via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 24 16:21:29 PDT 2016
Author: mren
Date: Thu Mar 24 18:21:29 2016
New Revision: 264358
URL: http://llvm.org/viewvc/llvm-project?rev=264358&view=rev
Log:
CXX TLS: collect return blocks after SelectAllBasicBlocks.
It is incorrect to get the corresponding MBB for a ReturnInst before
SelectAllBasicBlocks since SelectAllBasicBlocks can change the
correspondence between a ReturnInst and the MBB it is in.
PR27062
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/trunk/test/CodeGen/X86/cxx_tlscc64.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=264358&r1=264357&r2=264358&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Mar 24 18:21:29 2016
@@ -469,7 +469,6 @@ bool SelectionDAGISel::runOnMachineFunct
MF->setHasInlineAsm(false);
FuncInfo->SplitCSR = false;
- SmallVector<MachineBasicBlock*, 4> Returns;
// We split CSR if the target supports it for the given function
// and the function has only return exits.
@@ -482,12 +481,8 @@ bool SelectionDAGISel::runOnMachineFunct
continue;
const TerminatorInst *Term = BB.getTerminator();
- if (isa<UnreachableInst>(Term))
+ if (isa<UnreachableInst>(Term) || isa<ReturnInst>(Term))
continue;
- if (isa<ReturnInst>(Term)) {
- Returns.push_back(FuncInfo->MBBMap[&BB]);
- continue;
- }
// Bail out if the exit block is not Return nor Unreachable.
FuncInfo->SplitCSR = false;
@@ -509,8 +504,21 @@ bool SelectionDAGISel::runOnMachineFunct
RegInfo->EmitLiveInCopies(EntryMBB, TRI, *TII);
// Insert copies in the entry block and the return blocks.
- if (FuncInfo->SplitCSR)
+ if (FuncInfo->SplitCSR) {
+ SmallVector<MachineBasicBlock*, 4> Returns;
+ // Collect all the return blocks.
+ for (MachineBasicBlock &MBB : mf) {
+ if (!MBB.succ_empty())
+ continue;
+
+ MachineBasicBlock::iterator Term = MBB.getFirstTerminator();
+ if (Term != MBB.end() && Term->isReturn()) {
+ Returns.push_back(&MBB);
+ continue;
+ }
+ }
TLI->insertCopiesSplitCSR(EntryMBB, Returns);
+ }
DenseMap<unsigned, unsigned> LiveInMap;
if (!FuncInfo->ArgDbgValues.empty())
Modified: llvm/trunk/test/CodeGen/X86/cxx_tlscc64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cxx_tlscc64.ll?rev=264358&r1=264357&r2=264358&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cxx_tlscc64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cxx_tlscc64.ll Thu Mar 24 18:21:29 2016
@@ -151,5 +151,21 @@ entry:
ret void
}
+ at ssp_var = internal thread_local global i8 0, align 1
+
+; CHECK-LABEL: test_ssp
+; CHECK-NOT: pushq %r11
+; CHECK-NOT: pushq %r10
+; CHECK-NOT: pushq %r9
+; CHECK-NOT: pushq %r8
+; CHECK-NOT: pushq %rsi
+; CHECK-NOT: pushq %rdx
+; CHECK-NOT: pushq %rcx
+; CHECK-NOT: pushq %rbx
+; CHECK: callq
+define cxx_fast_tlscc nonnull i8* @test_ssp() #2 {
+ ret i8* @ssp_var
+}
attributes #0 = { nounwind "no-frame-pointer-elim"="true" }
attributes #1 = { nounwind }
+attributes #2 = { nounwind sspreq }
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