[llvm] r263123 - ARM: follow up improvements for SVN r263118
Tom Stellard via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 24 12:03:00 PDT 2016
Hi Tim/Renato,
Is this patch OK for the 3.8 branch?
-Tom
On Thu, Mar 10, 2016 at 04:26:38PM -0000, Saleem Abdulrasool via llvm-commits wrote:
> Author: compnerd
> Date: Thu Mar 10 10:26:37 2016
> New Revision: 263123
>
> URL: http://llvm.org/viewvc/llvm-project?rev=263123&view=rev
> Log:
> ARM: follow up improvements for SVN r263118
>
> The initial change was insufficiently complete for always getting the semantics
> of __builtin_longjmp correct. The builtin is translated into a
> `tInt_eh_sjlj_longjmp` DAG node. This node set R7 as clobbered. However, the
> code would then follow up with a clobber of R11. I had failed to notice the
> imp-def,kill on R7 in the isel. Unfortunately, it seems that it is not possible
> to conditionalise the Defs list via an !if. Instead, construct a new parallel
> WIN node and prefer that when targeting windows. This ensures that we now both
> correctly model the __builtin_longjmp as well as construct the frame in a more
> ABI conformant manner.
>
> Modified:
> llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
> llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
> llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
> llvm/trunk/test/CodeGen/ARM/Windows/builtin_longjmp.ll
>
> Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=263123&r1=263122&r2=263123&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Thu Mar 10 10:26:37 2016
> @@ -1852,13 +1852,13 @@ void ARMAsmPrinter::EmitInstruction(cons
> .addReg(0));
> return;
> }
> - case ARM::tInt_eh_sjlj_longjmp: {
> + case ARM::tInt_eh_sjlj_longjmp:
> + case ARM::tInt_WIN_eh_sjlj_longjmp: {
> // ldr $scratch, [$src, #8]
> // mov sp, $scratch
> // ldr $scratch, [$src, #4]
> // ldr r7, [$src]
> // bx $scratch
> - const Triple &TT = TM.getTargetTriple();
> unsigned SrcReg = MI->getOperand(0).getReg();
> unsigned ScratchReg = MI->getOperand(1).getReg();
>
> @@ -1888,7 +1888,7 @@ void ARMAsmPrinter::EmitInstruction(cons
> .addReg(0));
>
> EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tLDRi)
> - .addReg(TT.isOSWindows() ? ARM::R11 : ARM::R7)
> + .addReg(Opc == ARM::tInt_WIN_eh_sjlj_longjmp ? ARM::R11 : ARM::R7)
> .addReg(SrcReg)
> .addImm(0)
> // Predicate.
>
> Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=263123&r1=263122&r2=263123&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Thu Mar 10 10:26:37 2016
> @@ -632,6 +632,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeIn
> case ARM::Int_eh_sjlj_longjmp:
> return 16;
> case ARM::tInt_eh_sjlj_longjmp:
> + case ARM::tInt_WIN_eh_sjlj_longjmp:
> return 10;
> case ARM::Int_eh_sjlj_setjmp:
> case ARM::Int_eh_sjlj_setjmp_nofp:
>
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=263123&r1=263122&r2=263123&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Mar 10 10:26:37 2016
> @@ -294,6 +294,8 @@ def IsARM : Predicate<"!Subta
> def IsMachO : Predicate<"Subtarget->isTargetMachO()">;
> def IsNotMachO : Predicate<"!Subtarget->isTargetMachO()">;
> def IsNaCl : Predicate<"Subtarget->isTargetNaCl()">;
> +def IsWindows : Predicate<"Subtarget->isTargetWindows()">;
> +def IsNotWindows : Predicate<"!Subtarget->isTargetWindows()">;
> def UseNaClTrap : Predicate<"Subtarget->useNaClTrap()">,
> AssemblerPredicate<"FeatureNaClTrap", "NaCl">;
> def DontUseNaClTrap : Predicate<"!Subtarget->useNaClTrap()">;
>
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=263123&r1=263122&r2=263123&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Thu Mar 10 10:26:37 2016
> @@ -1329,7 +1329,14 @@ def tInt_eh_sjlj_longjmp : XI<(outs), (i
> AddrModeNone, 0, IndexModeNone,
> Pseudo, NoItinerary, "", "",
> [(ARMeh_sjlj_longjmp GPR:$src, GPR:$scratch)]>,
> - Requires<[IsThumb]>;
> + Requires<[IsThumb,IsNotWindows]>;
> +
> +let isBarrier = 1, hasSideEffects = 1, isTerminator = 1, isCodeGenOnly = 1,
> + Defs = [ R11, LR, SP ] in
> +def tInt_WIN_eh_sjlj_longjmp
> + : XI<(outs), (ins GPR:$src, GPR:$scratch), AddrModeNone, 0, IndexModeNone,
> + Pseudo, NoItinerary, "", "", [(ARMeh_sjlj_longjmp GPR:$src, GPR:$scratch)]>,
> + Requires<[IsThumb,IsWindows]>;
>
> //===----------------------------------------------------------------------===//
> // Non-Instruction Patterns
>
> Modified: llvm/trunk/test/CodeGen/ARM/Windows/builtin_longjmp.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/Windows/builtin_longjmp.ll?rev=263123&r1=263122&r2=263123&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/Windows/builtin_longjmp.ll (original)
> +++ llvm/trunk/test/CodeGen/ARM/Windows/builtin_longjmp.ll Thu Mar 10 10:26:37 2016
> @@ -8,6 +8,7 @@ entry:
> unreachable
> }
>
> +; CHECK: push.w {r11, lr}
> ; CHECK: ldr r[[SP:[0-9]+]], [r0, #8]
> ; CHECK: mov sp, r[[SP]]
> ; CHECK: ldr r[[PC:[0-9]+]], [r0, #4]
>
>
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