[PATCH] D18452: AMDGPU/SI: Enable lanemask tracking in misched

[Tom Stellard via llvm-commits]

tstellarAMD created this revision.
tstellarAMD added reviewers: nhaehnle, arsenm.
tstellarAMD added a subscriber: llvm-commits.
tstellarAMD added a dependency: D18451: AMDGPU/SI: Limit load clustering to 16 bytes instead of 4 instructions.
Herald added a subscriber: arsenm.

This results in higher register usage, but should make it easier for
the compiler to hide latency.

This pass is a prerequisite for some more scheduler improvements, and I
think the increase register usage with this patch is acceptable, because
when combined with the scheduler improvements, the total register usage
will decrease.

shader-db stats:

2382 shaders in 478 tests
Totals:
SGPRS: 48672 -> 49088 (0.85 %)
VGPRS: 34148 -> 34847 (2.05 %)
Code Size: 1285816 -> 1289128 (0.26 %) bytes
LDS: 28 -> 28 (0.00 %) blocks
Scratch: 492544 -> 573440 (16.42 %) bytes per wave
Max Waves: 6856 -> 6846 (-0.15 %)
Wait states: 0 -> 0 (0.00 %)

Depends on D18451

http://reviews.llvm.org/D18452

Files:
  lib/Target/AMDGPU/AMDGPUSubtarget.cpp
  test/CodeGen/AMDGPU/and.ll
  test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
  test/CodeGen/AMDGPU/captured-frame-index.ll
  test/CodeGen/AMDGPU/commute_modifiers.ll
  test/CodeGen/AMDGPU/ctlz.ll
  test/CodeGen/AMDGPU/ctlz_zero_undef.ll
  test/CodeGen/AMDGPU/ctpop64.ll
  test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
  test/CodeGen/AMDGPU/ds_read2_superreg.ll
  test/CodeGen/AMDGPU/ds_read2st64.ll
  test/CodeGen/AMDGPU/ds_write2.ll
  test/CodeGen/AMDGPU/fcopysign.f64.ll
  test/CodeGen/AMDGPU/ffloor.f64.ll
  test/CodeGen/AMDGPU/fneg-fabs.f64.ll
  test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.clamped.f64.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.buffer.atomic.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll
  test/CodeGen/AMDGPU/local-atomics.ll
  test/CodeGen/AMDGPU/local-atomics64.ll
  test/CodeGen/AMDGPU/max.ll
  test/CodeGen/AMDGPU/min.ll
  test/CodeGen/AMDGPU/mubuf.ll
  test/CodeGen/AMDGPU/setcc-opt.ll
  test/CodeGen/AMDGPU/setcc64.ll
  test/CodeGen/AMDGPU/si-scheduler.ll
  test/CodeGen/AMDGPU/sra.ll
  test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
  test/CodeGen/AMDGPU/trunc-cmp-constant.ll
  test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll

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