[PATCH] D18393: Replace a string comparison in ARMSubtarget.h with a tablegen entry in ARM.td (NFC)
Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 23 09:23:32 PDT 2016
This revision was automatically updated to reflect the committed changes.
Closed by commit rL264165: Replace a string comparison in ARMSubtarget.h with a tablegen entry in ARM.td… (authored by askrobov).
Changed prior to commit:
http://reviews.llvm.org/D18393?vs=51413&id=51432#toc
Repository:
rL LLVM
http://reviews.llvm.org/D18393
Files:
llvm/trunk/lib/Target/ARM/ARM.td
llvm/trunk/lib/Target/ARM/ARMSubtarget.h
Index: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
===================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h
@@ -43,8 +43,9 @@
protected:
enum ARMProcFamilyEnum {
Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA12, CortexA15,
- CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexA32, CortexA35,
- CortexA53, CortexA57, CortexA72, Krait, Swift, ExynosM1
+ CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexM3,
+ CortexA32, CortexA35, CortexA53, CortexA57, CortexA72,
+ Krait, Swift, ExynosM1
};
enum ARMProcClassEnum {
None, AClass, RClass, MClass
@@ -334,7 +335,7 @@
bool isCortexA9() const { return ARMProcFamily == CortexA9; }
bool isCortexA15() const { return ARMProcFamily == CortexA15; }
bool isSwift() const { return ARMProcFamily == Swift; }
- bool isCortexM3() const { return CPUString == "cortex-m3"; }
+ bool isCortexM3() const { return ARMProcFamily == CortexM3; }
bool isLikeA9() const { return isCortexA9() || isCortexA15() || isKrait(); }
bool isCortexR5() const { return ARMProcFamily == CortexR5; }
bool isKrait() const { return ARMProcFamily == Krait; }
Index: llvm/trunk/lib/Target/ARM/ARM.td
===================================================================
--- llvm/trunk/lib/Target/ARM/ARM.td
+++ llvm/trunk/lib/Target/ARM/ARM.td
@@ -278,6 +278,8 @@
def ProcR7 : SubtargetFeature<"r7", "ARMProcFamily", "CortexR7",
"Cortex-R7 ARM processors", []>;
+def ProcM3 : SubtargetFeature<"m3", "ARMProcFamily", "CortexM3",
+ "Cortex-M3 ARM processors", []>;
//===----------------------------------------------------------------------===//
// ARM schedules.
@@ -641,8 +643,8 @@
FeatureAvoidPartialCPSR,
FeatureT2XtPk]>;
-def : ProcNoItin<"cortex-m3", [ARMv7m]>;
-def : ProcNoItin<"sc300", [ARMv7m]>;
+def : ProcNoItin<"cortex-m3", [ARMv7m, ProcM3]>;
+def : ProcNoItin<"sc300", [ARMv7m, ProcM3]>;
def : ProcNoItin<"cortex-m4", [ARMv7em,
FeatureVFP4,
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