[PATCH] D14805: AMDGPU: Cache information about register pressure sets
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 22 13:24:50 PDT 2016
arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.
LGTM
================
Comment at: lib/Target/AMDGPU/SIRegisterInfo.cpp:118-121
@@ -109,1 +117,6 @@
+
+ if (SGPRPressureSets.test(Idx))
+ return SGPRLimit;
+
+ return VGPRLimit;
}
----------------
tstellarAMD wrote:
> arsenm wrote:
> > Are both SGPRPressureSets and VGPRPressureSets necessary? Can you just have one and assume if it isn't it's the other?
> It's because of the VS_32 register class has both SGPRs. and VGPRs.
I should try to reapply my patch to try to get VS_32 to not influence pressure
http://reviews.llvm.org/D14805
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