[PATCH] D18331: [ELF/AArch64] Simplify AArch64 isRelRelative
Adhemerval Zanella via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 21 14:17:03 PDT 2016
zatrazz created this revision.
zatrazz added reviewers: ruiu, rafael.
zatrazz added subscribers: llvm-commits, emaste, grimar.
zatrazz set the repository for this revision to rL LLVM.
zatrazz added a project: lld.
Herald added subscribers: rengolin, aemerson.
This patch simplifies the isRelRelative for AArch64 to just handle the
cases where it is not relative, instead of list all the relocations
that is. It also adds more testing for shared objects creation.
This patch is based upon http://reviews.llvm.org/D18330
Repository:
rL LLVM
http://reviews.llvm.org/D18331
Files:
ELF/Target.cpp
test/ELF/aarch64-relative.s
Index: test/ELF/aarch64-relative.s
===================================================================
--- test/ELF/aarch64-relative.s
+++ test/ELF/aarch64-relative.s
@@ -2,13 +2,20 @@
// RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t.o
// RUN: ld.lld %t.o -o %t.so -shared
// RUN: llvm-readobj -r %t.so | FileCheck %s
- adrp x8, .Lfoo
- strb w9, [x8, :lo12:.Lfoo]
- ldr w0, [x8, :lo12:.Lfoo]
- ldr x0, [x8, :lo12:.Lfoo]
- add x0, x0, :lo12:.Lfoo
- bl .Lfoo
+ adr x8, .Lfoo // R_AARCH64_ADR_PREL_LO21
+ adrp x8, .Lfoo // R_AARCH64_ADR_PREL_PG_HI21
+ strb w9, [x8, :lo12:.Lfoo] // R_AARCH64_LDST8_ABS_LO12_NC
+ ldr h17, [x19, :lo12:.Lfoo] // R_AARCH64_LDST16_ABS_LO12_NC
+ ldr w0, [x8, :lo12:.Lfoo] // R_AARCH64_LDST32_ABS_LO12_NC
+ ldr x0, [x8, :lo12:.Lfoo] // R_AARCH64_LDST64_ABS_LO12_NC
+ ldr q20, [x19, #:lo12:.Lfoo] // R_AARCH64_LDST128_ABS_LO12_NC
+ add x0, x0, :lo12:.Lfoo // R_AARCH64_ADD_ABS_LO12_NC
+ bl .Lfoo // R_AARCH64_CALL26
+ b .Lfoo // R_AARCH64_JUMP26
+ beq .Lfoo // R_AARCH64_CONDBR19
+ adr x1, .Lfoo // R_AARCH64_ADR_PREL_LO21
+ tbz x1, 7, .Lfoo // R_AARCH64_TSTBR14
.data
.Lfoo:
Index: ELF/Target.cpp
===================================================================
--- ELF/Target.cpp
+++ ELF/Target.cpp
@@ -1226,11 +1226,14 @@
}
bool AArch64TargetInfo::isRelRelative(uint32_t Type) const {
- return Type == R_AARCH64_PREL32 || Type == R_AARCH64_ADR_PREL_PG_HI21 ||
- Type == R_AARCH64_LDST8_ABS_LO12_NC ||
- Type == R_AARCH64_LDST32_ABS_LO12_NC ||
- Type == R_AARCH64_LDST64_ABS_LO12_NC ||
- Type == R_AARCH64_ADD_ABS_LO12_NC || Type == R_AARCH64_CALL26;
+ switch (Type) {
+ default:
+ return true;
+ case R_AARCH64_ABS64:
+ case R_AARCH64_ADR_GOT_PAGE:
+ case R_AARCH64_LD64_GOT_LO12_NC:
+ return !Config->Shared;
+ }
}
bool AArch64TargetInfo::isTlsInitialExecRel(uint32_t Type) const {
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