[llvm] r263977 - [Hexagon] Fix reserving emergency spill slots for register scavenger
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 21 12:57:08 PDT 2016
Author: kparzysz
Date: Mon Mar 21 14:57:08 2016
New Revision: 263977
URL: http://llvm.org/viewvc/llvm-project?rev=263977&view=rev
Log:
[Hexagon] Fix reserving emergency spill slots for register scavenger
- R10 and R11 are not reserved registers.
- Check for reserved registers when finding unused caller-saved registers.
Modified:
llvm/trunk/lib/Target/Hexagon/HexagonFrameLowering.cpp
llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp
llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.h
Modified: llvm/trunk/lib/Target/Hexagon/HexagonFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonFrameLowering.cpp?rev=263977&r1=263976&r2=263977&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonFrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonFrameLowering.cpp Mon Mar 21 14:57:08 2016
@@ -1046,26 +1046,19 @@ void HexagonFrameLowering::processFuncti
static bool needToReserveScavengingSpillSlots(MachineFunction &MF,
const HexagonRegisterInfo &HRI) {
MachineRegisterInfo &MRI = MF.getRegInfo();
- const MCPhysReg *CallerSavedRegs = HRI.getCallerSavedRegs(&MF);
- // Check for an unused caller-saved register.
- for ( ; *CallerSavedRegs; ++CallerSavedRegs) {
- MCPhysReg FreeReg = *CallerSavedRegs;
- if (MRI.isPhysRegUsed(FreeReg))
- continue;
-
- // Check aliased register usage.
- bool IsCurrentRegUsed = false;
- for (MCRegAliasIterator AI(FreeReg, &HRI, false); AI.isValid(); ++AI)
- if (MRI.isPhysRegUsed(*AI)) {
- IsCurrentRegUsed = true;
- break;
- }
- if (IsCurrentRegUsed)
- continue;
+ BitVector Reserved = HRI.getReservedRegs(MF);
- // Neither directly used nor used through an aliased register.
+ auto IsUsed = [&HRI,&MRI] (unsigned Reg) -> bool {
+ for (MCRegAliasIterator AI(Reg, &HRI, true); AI.isValid(); ++AI)
+ if (MRI.isPhysRegUsed(*AI))
+ return true;
return false;
- }
+ };
+
+ // Check for an unused caller-saved register.
+ for (const MCPhysReg *P = HRI.getCallerSavedRegs(&MF); *P; ++P)
+ if (!IsUsed(*P))
+ return false;
// All caller-saved registers are used.
return true;
}
Modified: llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp?rev=263977&r1=263976&r2=263977&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp Mon Mar 21 14:57:08 2016
@@ -109,8 +109,6 @@ HexagonRegisterInfo::getCalleeSavedRegs(
BitVector HexagonRegisterInfo::getReservedRegs(const MachineFunction &MF)
const {
BitVector Reserved(getNumRegs());
- Reserved.set(HEXAGON_RESERVED_REG_1);
- Reserved.set(HEXAGON_RESERVED_REG_2);
Reserved.set(Hexagon::R29);
Reserved.set(Hexagon::R30);
Reserved.set(Hexagon::R31);
Modified: llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.h?rev=263977&r1=263976&r2=263977&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.h (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.h Mon Mar 21 14:57:08 2016
@@ -21,21 +21,6 @@
#define GET_REGINFO_HEADER
#include "HexagonGenRegisterInfo.inc"
-//
-// We try not to hard code the reserved registers in our code,
-// so the following two macros were defined. However, there
-// are still a few places that R11 and R10 are hard wired.
-// See below. If, in the future, we decided to change the reserved
-// register. Don't forget changing the following places.
-//
-// 1. the "Defs" set of STriw_pred in HexagonInstrInfo.td
-// 2. the "Defs" set of LDri_pred in HexagonInstrInfo.td
-// 3. the definition of "IntRegs" in HexagonRegisterInfo.td
-// 4. the definition of "DoubleRegs" in HexagonRegisterInfo.td
-//
-#define HEXAGON_RESERVED_REG_1 Hexagon::R10
-#define HEXAGON_RESERVED_REG_2 Hexagon::R11
-
namespace llvm {
class HexagonRegisterInfo : public HexagonGenRegisterInfo {
public:
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