[PATCH] D15302: [Greedy regalloc] Replace analyzeSiblingValues with something new [Part1]
Wei Mi via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 21 11:06:41 PDT 2016
I noticed that even without my change, although compiler output "GCN:
NumVgprs is 256", when I looked at the trace of -debug-only=regalloc,
I found there were some VGPR unused.
Here is what I did:
~/workarea/llvm-r262808/dbuild/./bin/llc -march=amdgcn -mcpu=tahiti
-mattr=+vgpr-spilling -verify-machineinstrs <
~/workarea/llvm-r262808/src/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
-debug-only=regalloc >/dev/null 2>out1
Delete the trace from out1 before the section of "REGISTER MAP", then
execute the command below:
for ((i=0; i<256; i++)); do
grep "VGPR$i[^0-9]" out1 &>/dev/null
if [[ "$?" != "0" ]]; then
echo VGPR$i
fi
done
The output is:
VGPR40
VGPR189
VGPR190
So even if the compiler says GCN: NumVgprs is 256, there are three
VGPRs never used.
Thanks,
Wei.
On Mon, Mar 21, 2016 at 10:28 AM, Tom Stellard <thomas.stellard at amd.com> wrote:
> tstellarAMD added inline comments.
>
> ================
> Comment at: test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll:24
> @@ -23,3 +23,3 @@
>
> -; GCN: NumVgprs: 256
> +; GCN: NumVgprs: 254
> ; GCN: ScratchSize: 1024
> ----------------
> This is change confusing to me, because if we only use 254 VGPRs then there shouldn't be any spills, but there are still spill instructions being emitted. It seems like this is probably a bug, but I will need to look at it more closely to see if it is an AMDGPU bug or a generic regalloc bug.
>
>
> Repository:
> rL LLVM
>
> http://reviews.llvm.org/D15302
>
>
>
More information about the llvm-commits
mailing list