[llvm] r263842 - BPF: emit an error message for unsupported signed division operation

[Alexei Starovoitov via llvm-commits]

Author: ast
Date: Fri Mar 18 17:02:47 2016
New Revision: 263842

URL: http://llvm.org/viewvc/llvm-project?rev=263842&view=rev
Log:
BPF: emit an error message for unsupported signed division operation

Signed-off-by: Yonghong Song <yhs at plumgrid.com>
Signed-off-by: Alexei Starovoitov <ast at fb.com>

Added:
    llvm/trunk/test/CodeGen/BPF/sdiv_error.ll
Modified:
    llvm/trunk/lib/Target/BPF/BPFISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/BPF/BPFISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/BPFISelDAGToDAG.cpp?rev=263842&r1=263841&r2=263842&view=diff
==============================================================================
--- llvm/trunk/lib/Target/BPF/BPFISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/BPF/BPFISelDAGToDAG.cpp Fri Mar 18 17:02:47 2016
@@ -130,6 +130,18 @@ SDNode *BPFDAGToDAGISel::Select(SDNode *
   // tablegen selection should be handled here.
   switch (Opcode) {
   default: break;
+  case ISD::SDIV: {
+    DebugLoc Empty;
+    const DebugLoc &DL = Node->getDebugLoc();
+    if (DL != Empty)
+      errs() << "Error at line " << DL.getLine() << ": ";
+    else
+      errs() << "Error: ";
+    errs() << "Unsupport signed division for DAG: ";
+    Node->dump(CurDAG);
+    errs() << "Please convert to unsigned div/mod.\n";
+    break;
+  }
   case ISD::INTRINSIC_W_CHAIN: {
     unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
     switch (IntNo) {

Added: llvm/trunk/test/CodeGen/BPF/sdiv_error.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/BPF/sdiv_error.ll?rev=263842&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/BPF/sdiv_error.ll (added)
+++ llvm/trunk/test/CodeGen/BPF/sdiv_error.ll Fri Mar 18 17:02:47 2016
@@ -0,0 +1,9 @@
+; RUN: not llc -march=bpf < %s 2> %t1
+; RUN: FileCheck %s < %t1
+; CHECK: Unsupport signed division
+
+; Function Attrs: norecurse nounwind readnone
+define i32 @test(i32 %len) #0 {
+  %1 = srem i32 %len, 15
+  ret i32 %1
+}