[llvm] r263649 - [X86] Reduced alignment of widened vector load/stores to better match PR26953 cases
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 16 11:32:45 PDT 2016
Author: rksimon
Date: Wed Mar 16 13:32:44 2016
New Revision: 263649
URL: http://llvm.org/viewvc/llvm-project?rev=263649&view=rev
Log:
[X86] Reduced alignment of widened vector load/stores to better match PR26953 cases
Modified:
llvm/trunk/test/CodeGen/X86/widen_conv-3.ll
llvm/trunk/test/CodeGen/X86/widen_conv-4.ll
Modified: llvm/trunk/test/CodeGen/X86/widen_conv-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_conv-3.ll?rev=263649&r1=263648&r2=263649&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/widen_conv-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/widen_conv-3.ll Wed Mar 16 13:32:44 2016
@@ -40,7 +40,7 @@ define void @convert_v2i16_to_v2f32(<2 x
; X64-NEXT: retq
entry:
%val = sitofp <2 x i16> %src to <2 x float>
- store <2 x float> %val, <2 x float>* %dst.addr
+ store <2 x float> %val, <2 x float>* %dst.addr, align 4
ret void
}
@@ -52,9 +52,15 @@ define void @convert_v3i8_to_v3f32(<3 x
; X86-SSE2-NEXT: pushl %eax
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-SSE2-NEXT: movzwl (%ecx), %edx
+; X86-SSE2-NEXT: movd %edx, %xmm0
; X86-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
+; X86-SSE2-NEXT: movzbl 2(%ecx), %ecx
+; X86-SSE2-NEXT: movd %ecx, %xmm1
+; X86-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
+; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
+; X86-SSE2-NEXT: pslld $24, %xmm0
; X86-SSE2-NEXT: psrad $24, %xmm0
; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
; X86-SSE2-NEXT: movss %xmm0, (%eax)
@@ -71,9 +77,13 @@ define void @convert_v3i8_to_v3f32(<3 x
; X86-SSE42-NEXT: pushl %eax
; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-SSE42-NEXT: movl (%ecx), %ecx
-; X86-SSE42-NEXT: movl %ecx, (%esp)
-; X86-SSE42-NEXT: pmovsxbd (%esp), %xmm0
+; X86-SSE42-NEXT: movzbl 2(%ecx), %edx
+; X86-SSE42-NEXT: movzwl (%ecx), %ecx
+; X86-SSE42-NEXT: movd %ecx, %xmm0
+; X86-SSE42-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; X86-SSE42-NEXT: pinsrd $2, %edx, %xmm0
+; X86-SSE42-NEXT: pslld $24, %xmm0
+; X86-SSE42-NEXT: psrad $24, %xmm0
; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
; X86-SSE42-NEXT: extractps $2, %xmm0, 8(%eax)
; X86-SSE42-NEXT: extractps $1, %xmm0, 4(%eax)
@@ -83,9 +93,17 @@ define void @convert_v3i8_to_v3f32(<3 x
;
; X64-SSE2-LABEL: convert_v3i8_to_v3f32:
; X64-SSE2: # BB#0: # %entry
-; X64-SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X64-SSE2-NEXT: movzwl (%rsi), %eax
+; X64-SSE2-NEXT: movd %rax, %xmm0
+; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; X64-SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; X64-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; X64-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
+; X64-SSE2-NEXT: movzbl 2(%rsi), %eax
+; X64-SSE2-NEXT: movd %eax, %xmm1
+; X64-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
+; X64-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
+; X64-SSE2-NEXT: pslld $24, %xmm0
; X64-SSE2-NEXT: psrad $24, %xmm0
; X64-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
; X64-SSE2-NEXT: movlps %xmm0, (%rdi)
@@ -95,16 +113,22 @@ define void @convert_v3i8_to_v3f32(<3 x
;
; X64-SSE42-LABEL: convert_v3i8_to_v3f32:
; X64-SSE42: # BB#0: # %entry
-; X64-SSE42-NEXT: movl (%rsi), %eax
-; X64-SSE42-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
-; X64-SSE42-NEXT: pmovsxbd -{{[0-9]+}}(%rsp), %xmm0
+; X64-SSE42-NEXT: movzbl 2(%rsi), %eax
+; X64-SSE42-NEXT: movzwl (%rsi), %ecx
+; X64-SSE42-NEXT: movd %rcx, %xmm0
+; X64-SSE42-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; X64-SSE42-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
+; X64-SSE42-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; X64-SSE42-NEXT: pinsrd $2, %eax, %xmm0
+; X64-SSE42-NEXT: pslld $24, %xmm0
+; X64-SSE42-NEXT: psrad $24, %xmm0
; X64-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
; X64-SSE42-NEXT: extractps $2, %xmm0, 8(%rdi)
; X64-SSE42-NEXT: movlps %xmm0, (%rdi)
; X64-SSE42-NEXT: retq
entry:
- %load = load <3 x i8>, <3 x i8>* %src.addr
+ %load = load <3 x i8>, <3 x i8>* %src.addr, align 1
%cvt = sitofp <3 x i8> %load to <3 x float>
- store <3 x float> %cvt, <3 x float>* %dst.addr
+ store <3 x float> %cvt, <3 x float>* %dst.addr, align 4
ret void
}
Modified: llvm/trunk/test/CodeGen/X86/widen_conv-4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_conv-4.ll?rev=263649&r1=263648&r2=263649&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/widen_conv-4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/widen_conv-4.ll Wed Mar 16 13:32:44 2016
@@ -16,7 +16,7 @@ define void @convert_v7i16_v7f32(<7 x fl
; X86-SSE2-NEXT: cvtdq2ps %xmm2, %xmm2
; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
-; X86-SSE2-NEXT: movaps %xmm0, (%eax)
+; X86-SSE2-NEXT: movups %xmm0, (%eax)
; X86-SSE2-NEXT: movss %xmm2, 16(%eax)
; X86-SSE2-NEXT: movaps %xmm2, %xmm0
; X86-SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1,0]
@@ -35,7 +35,7 @@ define void @convert_v7i16_v7f32(<7 x fl
; X86-SSE42-NEXT: cvtdq2ps %xmm2, %xmm1
; X86-SSE42-NEXT: extractps $2, %xmm0, 24(%eax)
; X86-SSE42-NEXT: extractps $1, %xmm0, 20(%eax)
-; X86-SSE42-NEXT: movaps %xmm1, (%eax)
+; X86-SSE42-NEXT: movups %xmm1, (%eax)
; X86-SSE42-NEXT: movss %xmm0, 16(%eax)
; X86-SSE42-NEXT: retl
;
@@ -48,7 +48,7 @@ define void @convert_v7i16_v7f32(<7 x fl
; X64-SSE2-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
; X64-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
; X64-SSE2-NEXT: movlps %xmm0, 16(%rdi)
-; X64-SSE2-NEXT: movaps %xmm2, (%rdi)
+; X64-SSE2-NEXT: movups %xmm2, (%rdi)
; X64-SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1,0]
; X64-SSE2-NEXT: movss %xmm0, 24(%rdi)
; X64-SSE2-NEXT: retq
@@ -62,11 +62,11 @@ define void @convert_v7i16_v7f32(<7 x fl
; X64-SSE42-NEXT: cvtdq2ps %xmm2, %xmm1
; X64-SSE42-NEXT: extractps $2, %xmm0, 24(%rdi)
; X64-SSE42-NEXT: movlps %xmm0, 16(%rdi)
-; X64-SSE42-NEXT: movaps %xmm1, (%rdi)
+; X64-SSE42-NEXT: movups %xmm1, (%rdi)
; X64-SSE42-NEXT: retq
entry:
%val = uitofp <7 x i16> %src to <7 x float>
- store <7 x float> %val, <7 x float>* %dst.addr
+ store <7 x float> %val, <7 x float>* %dst.addr, align 4
ret void
}
@@ -78,10 +78,15 @@ define void @convert_v3i8_to_v3f32(<3 x
; X86-SSE2-NEXT: pushl %eax
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; X86-SSE2-NEXT: pxor %xmm1, %xmm1
-; X86-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
-; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
+; X86-SSE2-NEXT: movzwl (%ecx), %edx
+; X86-SSE2-NEXT: movd %edx, %xmm0
+; X86-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
+; X86-SSE2-NEXT: movzbl 2(%ecx), %ecx
+; X86-SSE2-NEXT: movd %ecx, %xmm1
+; X86-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
+; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
+; X86-SSE2-NEXT: andps .LCPI1_0, %xmm0
; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
; X86-SSE2-NEXT: movss %xmm0, (%eax)
; X86-SSE2-NEXT: movaps %xmm0, %xmm1
@@ -97,7 +102,12 @@ define void @convert_v3i8_to_v3f32(<3 x
; X86-SSE42-NEXT: pushl %eax
; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-SSE42-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
+; X86-SSE42-NEXT: movzbl 2(%ecx), %edx
+; X86-SSE42-NEXT: movzwl (%ecx), %ecx
+; X86-SSE42-NEXT: movd %ecx, %xmm0
+; X86-SSE42-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; X86-SSE42-NEXT: pinsrd $2, %edx, %xmm0
+; X86-SSE42-NEXT: pand .LCPI1_0, %xmm0
; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
; X86-SSE42-NEXT: extractps $2, %xmm0, 8(%eax)
; X86-SSE42-NEXT: extractps $1, %xmm0, 4(%eax)
@@ -107,10 +117,17 @@ define void @convert_v3i8_to_v3f32(<3 x
;
; X64-SSE2-LABEL: convert_v3i8_to_v3f32:
; X64-SSE2: # BB#0: # %entry
-; X64-SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; X64-SSE2-NEXT: pxor %xmm1, %xmm1
-; X64-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
-; X64-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
+; X64-SSE2-NEXT: movzwl (%rsi), %eax
+; X64-SSE2-NEXT: movd %rax, %xmm0
+; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; X64-SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
+; X64-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; X64-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
+; X64-SSE2-NEXT: movzbl 2(%rsi), %eax
+; X64-SSE2-NEXT: movd %eax, %xmm1
+; X64-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
+; X64-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
+; X64-SSE2-NEXT: andps {{.*}}(%rip), %xmm0
; X64-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
; X64-SSE2-NEXT: movlps %xmm0, (%rdi)
; X64-SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1,0]
@@ -119,14 +136,21 @@ define void @convert_v3i8_to_v3f32(<3 x
;
; X64-SSE42-LABEL: convert_v3i8_to_v3f32:
; X64-SSE42: # BB#0: # %entry
-; X64-SSE42-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
+; X64-SSE42-NEXT: movzbl 2(%rsi), %eax
+; X64-SSE42-NEXT: movzwl (%rsi), %ecx
+; X64-SSE42-NEXT: movd %rcx, %xmm0
+; X64-SSE42-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; X64-SSE42-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
+; X64-SSE42-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; X64-SSE42-NEXT: pinsrd $2, %eax, %xmm0
+; X64-SSE42-NEXT: pand {{.*}}(%rip), %xmm0
; X64-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
; X64-SSE42-NEXT: extractps $2, %xmm0, 8(%rdi)
; X64-SSE42-NEXT: movlps %xmm0, (%rdi)
; X64-SSE42-NEXT: retq
entry:
- %load = load <3 x i8>, <3 x i8>* %src.addr
+ %load = load <3 x i8>, <3 x i8>* %src.addr, align 1
%cvt = uitofp <3 x i8> %load to <3 x float>
- store <3 x float> %cvt, <3 x float>* %dst.addr
+ store <3 x float> %cvt, <3 x float>* %dst.addr, align 4
ret void
}
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