[PATCH] D18164: [tsan] Do not instrument reads/writes to instruction profile counters.

[Dmitry Vyukov via llvm-commits]

dvyukov added a comment.

> We are probably talking about different things here.  My main concern is the additional constraints imposed on the optimizer that can penalize optimizations (no-op or not on a target). For instance, memory dependence analysis treats Monotonic loads as 'read+write' (ModRef). This can certainly affect DSE, etc.  On x86, the pseudo instruction generated for Monotonic load is ACQUIRE_MOV with Volatile bit set. It might have some impact too.


The first part of this is llvm optimizer bugs that needs to be fixed.
The volatile is both llvm bug and fixes a bug in current profiler implementation. We don't want profile counters to be cached in registers infinitely. Atomics guarantee eventual visibility of stores to other threads. And that's exactly what we want here. Volatile is a crude way to achieve that. Ideally, optimizer eliminates duplicate stores when it can prove that there is finite number of them; but does not try to eliminate potentially infinite sequences of stores.

There is _absolutely_ no difference between this compiler-emitted instrumentation and user code. If optimizer is bad, then user needs to choose between correct and fast code. And that's definitely not what we want long term.


http://reviews.llvm.org/D18164