[PATCH] D15302: [Greedy regalloc] Replace analyzeSiblingValues with something new [Part1]
Wei Mi via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 14 14:00:55 PDT 2016
wmi updated this revision to Diff 50643.
wmi added a comment.
Rebase the merged patch to r262808. Patch verified using llvm testsuite on x86-64 and qemu-aarch64.
Repository:
rL LLVM
http://reviews.llvm.org/D15302
Files:
include/llvm/CodeGen/LiveRangeEdit.h
lib/CodeGen/InlineSpiller.cpp
lib/CodeGen/LiveRangeEdit.cpp
lib/CodeGen/RegAllocBase.cpp
lib/CodeGen/RegAllocBase.h
lib/CodeGen/RegAllocBasic.cpp
lib/CodeGen/RegAllocGreedy.cpp
lib/CodeGen/RegAllocPBQP.cpp
lib/CodeGen/RegisterCoalescer.cpp
lib/CodeGen/Spiller.h
lib/CodeGen/SplitKit.cpp
lib/CodeGen/SplitKit.h
test/CodeGen/AArch64/aarch64-deferred-spilling.ll
test/CodeGen/ARM/subreg-remat.ll
test/CodeGen/SPARC/spill.ll
test/CodeGen/X86/avx512-bugfix-25270.ll
test/CodeGen/X86/fold-push.ll
test/CodeGen/X86/hoist-spill.ll
test/CodeGen/X86/new-remat.ll
test/CodeGen/X86/ragreedy-hoist-spill.ll
test/CodeGen/X86/vselect-minmax.ll
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