[llvm] r263259 - [GlobalISel][Target] Add an opcode for unconditional branch.
Quentin Colombet via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 11 09:27:38 PST 2016
Author: qcolombet
Date: Fri Mar 11 11:27:38 2016
New Revision: 263259
URL: http://llvm.org/viewvc/llvm-project?rev=263259&view=rev
Log:
[GlobalISel][Target] Add an opcode for unconditional branch.
Modified:
llvm/trunk/include/llvm/Target/GenericOpcodes.td
llvm/trunk/include/llvm/Target/TargetOpcodes.def
llvm/trunk/test/TableGen/trydecode-emission.td
llvm/trunk/test/TableGen/trydecode-emission2.td
llvm/trunk/test/TableGen/trydecode-emission3.td
Modified: llvm/trunk/include/llvm/Target/GenericOpcodes.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/GenericOpcodes.td?rev=263259&r1=263258&r2=263259&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/GenericOpcodes.td (original)
+++ llvm/trunk/include/llvm/Target/GenericOpcodes.td Fri Mar 11 11:27:38 2016
@@ -20,4 +20,15 @@ def G_ADD : Instruction {
let hasSideEffects = 0;
let isCommutable = 1;
}
+
+// Generic unconditional branch.
+def G_BR : Instruction {
+ let OutOperandList = (outs);
+ let InOperandList = (ins unknown:$src1);
+ let AsmString = "";
+ let hasSideEffects = 0;
+ let isBranch = 1;
+ let isTerminator = 1;
+}
+
// TODO: Add the other generic opcodes.
Modified: llvm/trunk/include/llvm/Target/TargetOpcodes.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOpcodes.def?rev=263259&r1=263258&r2=263259&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetOpcodes.def (original)
+++ llvm/trunk/include/llvm/Target/TargetOpcodes.def Fri Mar 11 11:27:38 2016
@@ -141,12 +141,15 @@ HANDLE_TARGET_OPCODE(FAULTING_LOAD_OP, 2
HANDLE_TARGET_OPCODE(G_ADD, 23)
HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_START, G_ADD)
+/// Generic BRANCH instruction. This is an unconditional branch.
+HANDLE_TARGET_OPCODE(G_BR, 24)
+
// TODO: Add more generic opcodes as we move along.
/// Marker for the end of the generic opcode.
/// This is used to check if an opcode is in the range of the
/// generic opcodes.
-HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_END, G_ADD)
+HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_END, G_BR)
/// BUILTIN_OP_END - This must be the last enum value in this list.
/// The target-specific post-isel opcode values start here.
Modified: llvm/trunk/test/TableGen/trydecode-emission.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/trydecode-emission.td?rev=263259&r1=263258&r2=263259&view=diff
==============================================================================
--- llvm/trunk/test/TableGen/trydecode-emission.td (original)
+++ llvm/trunk/test/TableGen/trydecode-emission.td Fri Mar 11 11:27:38 2016
@@ -36,8 +36,8 @@ def InstB : TestInstruction {
// CHECK: /* 0 */ MCD::OPC_ExtractField, 4, 4, // Inst{7-4} ...
// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 14, 0, // Skip to: 21
// CHECK-NEXT: /* 7 */ MCD::OPC_CheckField, 2, 2, 0, 5, 0, // Skip to: 18
-// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 25, 0, 0, 0, // Opcode: InstB, skip to: 18
-// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 24, 1, // Opcode: InstA
+// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 26, 0, 0, 0, // Opcode: InstB, skip to: 18
+// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 25, 1, // Opcode: InstA
// CHECK-NEXT: /* 21 */ MCD::OPC_Fail,
// CHECK: if (DecodeInstB(MI, insn, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = false; return MCDisassembler::Fail; }
Modified: llvm/trunk/test/TableGen/trydecode-emission2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/trydecode-emission2.td?rev=263259&r1=263258&r2=263259&view=diff
==============================================================================
--- llvm/trunk/test/TableGen/trydecode-emission2.td (original)
+++ llvm/trunk/test/TableGen/trydecode-emission2.td Fri Mar 11 11:27:38 2016
@@ -35,9 +35,9 @@ def InstB : TestInstruction {
// CHECK-NEXT: /* 7 */ MCD::OPC_ExtractField, 5, 3, // Inst{7-5} ...
// CHECK-NEXT: /* 10 */ MCD::OPC_FilterValue, 0, 22, 0, // Skip to: 36
// CHECK-NEXT: /* 14 */ MCD::OPC_CheckField, 0, 2, 3, 5, 0, // Skip to: 25
-// CHECK-NEXT: /* 20 */ MCD::OPC_TryDecode, 25, 0, 0, 0, // Opcode: InstB, skip to: 25
+// CHECK-NEXT: /* 20 */ MCD::OPC_TryDecode, 26, 0, 0, 0, // Opcode: InstB, skip to: 25
// CHECK-NEXT: /* 25 */ MCD::OPC_CheckField, 3, 2, 0, 5, 0, // Skip to: 36
-// CHECK-NEXT: /* 31 */ MCD::OPC_TryDecode, 24, 1, 0, 0, // Opcode: InstA, skip to: 36
+// CHECK-NEXT: /* 31 */ MCD::OPC_TryDecode, 25, 1, 0, 0, // Opcode: InstA, skip to: 36
// CHECK-NEXT: /* 36 */ MCD::OPC_Fail,
// CHECK: if (DecodeInstB(MI, insn, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = false; return MCDisassembler::Fail; }
Modified: llvm/trunk/test/TableGen/trydecode-emission3.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/trydecode-emission3.td?rev=263259&r1=263258&r2=263259&view=diff
==============================================================================
--- llvm/trunk/test/TableGen/trydecode-emission3.td (original)
+++ llvm/trunk/test/TableGen/trydecode-emission3.td Fri Mar 11 11:27:38 2016
@@ -37,8 +37,8 @@ def InstB : TestInstruction {
// CHECK: /* 0 */ MCD::OPC_ExtractField, 4, 4, // Inst{7-4} ...
// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 14, 0, // Skip to: 21
// CHECK-NEXT: /* 7 */ MCD::OPC_CheckField, 2, 2, 0, 5, 0, // Skip to: 18
-// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 25, 0, 0, 0, // Opcode: InstB, skip to: 18
-// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 24, 1, // Opcode: InstA
+// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 26, 0, 0, 0, // Opcode: InstB, skip to: 18
+// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 25, 1, // Opcode: InstA
// CHECK-NEXT: /* 21 */ MCD::OPC_Fail,
// CHECK: if (DecodeInstBOp(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = false; return MCDisassembler::Fail; }
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