[llvm] r263132 - [ARM] Cortex-R8 support
Alexandros Lamprineas via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 10 09:38:42 PST 2016
Author: alelab01
Date: Thu Mar 10 11:38:41 2016
New Revision: 263132
URL: http://llvm.org/viewvc/llvm-project?rev=263132&view=rev
Log:
[ARM] Cortex-R8 support
This patch adds Cortex-R8 to Target Parser and TableGen.
It also adds CodeGen tests for the build attributes.
Patch by Pablo Barrio.
Differential Revision: http://reviews.llvm.org/D17925
Modified:
llvm/trunk/include/llvm/Support/ARMTargetParser.def
llvm/trunk/lib/Target/ARM/ARM.td
llvm/trunk/test/CodeGen/ARM/build-attributes.ll
Modified: llvm/trunk/include/llvm/Support/ARMTargetParser.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ARMTargetParser.def?rev=263132&r1=263131&r2=263132&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/ARMTargetParser.def (original)
+++ llvm/trunk/include/llvm/Support/ARMTargetParser.def Thu Mar 10 11:38:41 2016
@@ -209,6 +209,8 @@ ARM_CPU_NAME("cortex-r5", AK_ARMV7R, FK_
(AEK_MP | AEK_HWDIVARM))
ARM_CPU_NAME("cortex-r7", AK_ARMV7R, FK_VFPV3_D16_FP16, false,
(AEK_MP | AEK_HWDIVARM))
+ARM_CPU_NAME("cortex-r8", AK_ARMV7R, FK_VFPV3_D16_FP16, false,
+ (AEK_MP | AEK_HWDIVARM))
ARM_CPU_NAME("sc300", AK_ARMV7M, FK_NONE, false, AEK_NONE)
ARM_CPU_NAME("cortex-m3", AK_ARMV7M, FK_NONE, true, AEK_NONE)
ARM_CPU_NAME("cortex-m4", AK_ARMV7EM, FK_FPV4_SP_D16, true, AEK_NONE)
Modified: llvm/trunk/lib/Target/ARM/ARM.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=263132&r1=263131&r2=263132&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARM.td (original)
+++ llvm/trunk/lib/Target/ARM/ARM.td Thu Mar 10 11:38:41 2016
@@ -627,6 +627,18 @@ def : ProcessorModel<"cortex-r7", Cort
FeatureAvoidPartialCPSR,
FeatureT2XtPk]>;
+def : ProcessorModel<"cortex-r8", CortexA8Model, [ARMv7r,
+ FeatureHasRAS,
+ FeatureVFP3,
+ FeatureD16,
+ FeatureFP16,
+ FeatureMP,
+ FeatureSlowFPBrcc,
+ FeatureHWDivARM,
+ FeatureHasSlowFPVMLx,
+ FeatureAvoidPartialCPSR,
+ FeatureT2XtPk]>;
+
def : ProcNoItin<"cortex-m3", [ARMv7m]>;
def : ProcNoItin<"sc300", [ARMv7m]>;
Modified: llvm/trunk/test/CodeGen/ARM/build-attributes.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/build-attributes.ll?rev=263132&r1=263131&r2=263132&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/build-attributes.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/build-attributes.ll Thu Mar 10 11:38:41 2016
@@ -105,6 +105,9 @@
; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
+; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8
+; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST
+; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
@@ -1215,6 +1218,34 @@
; CORTEX-R7-FAST-NOT: .eabi_attribute 22
; CORTEX-R7-FAST: .eabi_attribute 23, 1
+; CORTEX-R8: .cpu cortex-r8
+; CORTEX-R8: .eabi_attribute 6, 10
+; CORTEX-R8: .eabi_attribute 7, 82
+; CORTEX-R8: .eabi_attribute 8, 1
+; CORTEX-R8: .eabi_attribute 9, 2
+; CORTEX-R8: .fpu vfpv3-d16-fp16
+; CORTEX-R8-NOT: .eabi_attribute 19
+;; We default to IEEE 754 compliance
+; CORTEX-R8: .eabi_attribute 20, 1
+; CORTEX-R8: .eabi_attribute 21, 1
+; CORTEX-R8-NOT: .eabi_attribute 22
+; CORTEX-R8: .eabi_attribute 23, 3
+; CORTEX-R8: .eabi_attribute 24, 1
+; CORTEX-R8: .eabi_attribute 25, 1
+; CORTEX-R8-NOT: .eabi_attribute 28
+; CORTEX-R8: .eabi_attribute 36, 1
+; CORTEX-R8: .eabi_attribute 38, 1
+; CORTEX-R8: .eabi_attribute 42, 1
+; CORTEX-R8: .eabi_attribute 44, 2
+; CORTEX-R8-NOT: .eabi_attribute 68
+
+; CORTEX-R8-FAST-NOT: .eabi_attribute 19
+;; The R8 has the VFPv3 FP unit, which always flushes preserving sign.
+; CORTEX-R8-FAST: .eabi_attribute 20, 2
+; CORTEX-R8-FAST-NOT: .eabi_attribute 21
+; CORTEX-R8-FAST-NOT: .eabi_attribute 22
+; CORTEX-R8-FAST: .eabi_attribute 23, 1
+
; CORTEX-A35: .cpu cortex-a35
; CORTEX-A35: .eabi_attribute 6, 14
; CORTEX-A35: .eabi_attribute 7, 65
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