[PATCH] D17885: [Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance

[Chuang-Yu Cheng via llvm-commits]

cycheng updated this revision to Diff 50274.
cycheng marked 2 inline comments as done.
cycheng added a comment.

Fixed issues pointed out by nemanjai (http://reviews.llvm.org/D17885#369199)

- Implement lnia (extended mnemonic of addpcis)
- Implement floating register pair (but we need to write inline assembly code to test register allocation, later todo)
- Move X_BF3_IM6_RS5 to PPCInstrFormats.td


http://reviews.llvm.org/D17885

Files:
  lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
  lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
  lib/Target/PowerPC/PPCInstr64Bit.td
  lib/Target/PowerPC/PPCInstrFormats.td
  lib/Target/PowerPC/PPCInstrInfo.td
  lib/Target/PowerPC/PPCRegisterInfo.td
  lib/Target/PowerPC/README_P9.txt
  test/MC/Disassembler/PowerPC/ppc64-encoding.txt
  test/MC/PowerPC/ppc64-encoding-ext.s
  test/MC/PowerPC/ppc64-encoding.s

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