[PATCH] D17328: [mips][microMIPS] Implement MTC*, MTHC* and DMTC* instructions

[Daniel Sanders via llvm-commits]

dsanders added a comment.

> Instructions that access coprocessor 2 don't have a selector. The Impl field should be treated as a 5 bit register field for consistency with binutils.


I'm surprised by this but it's correct. It's worth mentioning that this only applies to microMIPS though. The assembler has traditionally accepted a sel operand for the other ISA's.


http://reviews.llvm.org/D17328