[PATCH] D17942: [AArch64] Optimize test and branch sequence when the test's constant operand is power of 2

Tim Northover via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 9 07:02:45 PST 2016


t.p.northover added inline comments.

================
Comment at: lib/Target/AArch64/AArch64InstrInfo.cpp:3073
@@ -3006,3 +3072,3 @@
   // Look for CSINC
   if (!(DefMI->getOpcode() == AArch64::CSINCWr &&
         DefMI->getOperand(1).getReg() == AArch64::WZR &&
----------------
bmakam wrote:
> t.p.northover wrote:
> > I'd be inclined to make this whole thing a switch on `DefMI->getOpcode()` once it's been found. They're handled more like sibling cases anyway, and I could easily see us adding other patterns later.
> Sounds reasonable to me again, will do in updated patch. Just out of curiosity, what other patterns do you think can be added?
The one I thought of the other day was MOV/CBZ -> B. "ORR #imm" too. I've no idea if these occur enough to be worthwhile though, so no need to add them unless you actually want to.


http://reviews.llvm.org/D17942





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