[PATCH] D17989: [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV, SRL and SRLV instructions

[Zlatko Buljan via llvm-commits]

zbuljan created this revision.
zbuljan added reviewers: dsanders, hvarga, zoran.jovanovic.
zbuljan added subscribers: petarj, llvm-commits.
Herald added a reviewer: vkalintiris.
Herald added a subscriber: dsanders.

The patch adds CodeGen support for microMIPSr6 SLL16, SRL16, SLL, SLLV, SRA, SRAV, SRL and SRLV instructions:

- added DAG patterns for proper selection of shift instructions
- added alias definitions for microMIPS instructions
- separated microMIPS instructions from equivalent MIPS instructions using NotInMicroMips predicate
- updated .ll files with tests for microMIPSr6 instructions
- added tests for the standard encodings
- added invalid operand tests
- fixed opcode strings in desc. classes for a couple of 16-bit instructions

http://reviews.llvm.org/D17989

Files:
  lib/Target/Mips/MicroMips32r6InstrInfo.td
  lib/Target/Mips/MicroMipsInstrInfo.td
  lib/Target/Mips/MipsInstrInfo.td
  test/CodeGen/Mips/llvm-ir/ashr.ll
  test/CodeGen/Mips/llvm-ir/lshr.ll
  test/CodeGen/Mips/llvm-ir/shl.ll
  test/CodeGen/Mips/micromips-shift.ll
  test/MC/Disassembler/Mips/micromips32r3/valid-el.txt
  test/MC/Disassembler/Mips/micromips32r3/valid.txt
  test/MC/Disassembler/Mips/micromips32r6/valid.txt
  test/MC/Disassembler/Mips/micromips64r6/valid.txt
  test/MC/Mips/micromips-shift-instructions.s
  test/MC/Mips/micromips/invalid.s
  test/MC/Mips/micromips32r6/invalid.s
  test/MC/Mips/micromips32r6/valid.s
  test/MC/Mips/micromips64r6/invalid.s
  test/MC/Mips/micromips64r6/valid.s

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