[PATCH] D17943: [Aarch64] Add pass LoopDataPrefetch for Cyclone

[Adam Nemet via llvm-commits]

anemet created this revision.
anemet added a reviewer: t.p.northover.
anemet added subscribers: hfinkel, llvm-commits.
Herald added subscribers: rengolin, aemerson.

This wires up the pass for Cyclone but keeps it off for now because we
need a few more TTIs.

The getPrefetchMinStride value is not very well tuned right now but it
works well with CFP2006/433.milc which motivated this.

Tests will be added as part of the upcoming large-stride prefetching
patch.

http://reviews.llvm.org/D17943

Files:
  lib/Target/AArch64/AArch64TargetMachine.cpp
  lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  lib/Target/AArch64/AArch64TargetTransformInfo.h

Index: lib/Target/AArch64/AArch64TargetTransformInfo.h
===================================================================
--- lib/Target/AArch64/AArch64TargetTransformInfo.h
+++ lib/Target/AArch64/AArch64TargetTransformInfo.h
@@ -127,6 +127,10 @@
   int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor,
                                  ArrayRef<unsigned> Indices, unsigned Alignment,
                                  unsigned AddressSpace);
+
+  unsigned getCacheLineSize();
+
+  unsigned getPrefetchDistance();
   /// @}
 };
 
Index: lib/Target/AArch64/AArch64TargetTransformInfo.cpp
===================================================================
--- lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -20,6 +20,11 @@
 
 #define DEBUG_TYPE "aarch64tti"
 
+static cl::opt<unsigned> CyclonePrefetchDistance(
+    "cyclone-prefetch-distance",
+    cl::desc("Number of instructions to prefetch ahead for Cyclone"),
+    cl::init(280), cl::Hidden);
+
 /// \brief Calculate the cost of materializing a 64-bit value. This helper
 /// method might only calculate a fraction of a larger immediate. Therefore it
 /// is valid to return a cost of ZERO.
@@ -573,3 +578,15 @@
   }
   return true;
 }
+
+unsigned AArch64TTIImpl::getCacheLineSize() {
+  if (ST->isCyclone())
+    return 64;
+  return BaseT::getCacheLineSize();
+}
+
+unsigned AArch64TTIImpl::getPrefetchDistance() {
+  if (ST->isCyclone())
+    return CyclonePrefetchDistance;
+  return BaseT::getPrefetchDistance();
+}
Index: lib/Target/AArch64/AArch64TargetMachine.cpp
===================================================================
--- lib/Target/AArch64/AArch64TargetMachine.cpp
+++ lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -100,6 +100,11 @@
 EnableGlobalMerge("aarch64-global-merge", cl::Hidden,
                   cl::desc("Enable the global merge pass"));
 
+static cl::opt<bool>
+    EnableLoopDataPrefetch("aarch64-loop-data-prefetch", cl::Hidden,
+                           cl::desc("Enable the loop data prefetch pass"),
+                           cl::init(false));
+
 extern "C" void LLVMInitializeAArch64Target() {
   // Register the target.
   RegisterTargetMachine<AArch64leTargetMachine> X(TheAArch64leTarget);
@@ -234,6 +239,11 @@
   if (TM->getOptLevel() != CodeGenOpt::None && EnableAtomicTidy)
     addPass(createCFGSimplificationPass());
 
+  // Run this before LSR to remove the multiplies involved in computing the
+  // pointer values N iterations ahead.
+  if (TM->getOptLevel() != CodeGenOpt::None && EnableLoopDataPrefetch)
+    addPass(createLoopDataPrefetchPass());
+
   TargetPassConfig::addIRPasses();
 
   // Match interleaved memory accesses to ldN/stN intrinsics.


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