[PATCH] D17833: [tsan] Add support for pointer typed atomic stores, loads, and cmpxchg

[Dmitry Vyukov via llvm-commits]

dvyukov accepted this revision.
dvyukov added a comment.
This revision is now accepted and ready to land.

Eager to see Tsan for Swift!
LGTM


================
Comment at: test/Instrumentation/ThreadSanitizer/atomic.ll:1196
@@ +1195,3 @@
+; CHECK: bitcast i8** %{{.+}} to i64*
+; CHECK-NEXT: call i64 @__tsan_atomic64_load(i64* %{{.+}}, i32 5), !dbg
+; CHECK-NEXT: inttoptr i64 %{{.+}} to i8*
----------------
zaks.anna wrote:
> dvyukov wrote:
> > Are you sure that we don't run these tests on 32-bit platforms? It will fail on 32-bit platform, right?
> I believe this will not fail since the test specifies the target layout, where pointers are 64 bits long:
>      target datalayout = "e-p:64:64:64-...
> 
> "p[n]:<size>:<abi>:<pref>
>   This specifies the size of a pointer and its <abi> and <pref>erred alignments for address space n. All sizes are in bits.  
>   The address space, n, is optional, and if not specified, denotes the default address space 0. The value of n must be in the range [1,2^23)."
> 
ack


http://reviews.llvm.org/D17833