[PATCH] D17786: [X86] Enable forwarding bool arguments in tail calls (PR26305)

Hans Wennborg via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 2 18:11:22 PST 2016


This revision was automatically updated to reflect the committed changes.
Closed by commit rL262575: [X86] Enable forwarding bool arguments in tail calls (PR26305) (authored by hans).

Changed prior to commit:
  http://reviews.llvm.org/D17786?vs=49649&id=49695#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D17786

Files:
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/test/CodeGen/X86/tail-call-casts.ll

Index: llvm/trunk/test/CodeGen/X86/tail-call-casts.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/tail-call-casts.ll
+++ llvm/trunk/test/CodeGen/X86/tail-call-casts.ll
@@ -0,0 +1,27 @@
+; RUN: llc -mtriple=i686-unknown-linux-gnu -o - %s | FileCheck %s
+
+declare void @g_bool(i1 zeroext)
+define void @f_bool(i1 zeroext %x) {
+entry:
+  tail call void @g_bool(i1 zeroext %x)
+  ret void
+
+; Forwarding a bool in a tail call works.
+; CHECK-LABEL: f_bool:
+; CHECK-NOT:   movz
+; CHECK:       jmp g_bool
+}
+
+
+declare void @g_float(float)
+define void @f_i32(i32 %x) {
+entry:
+  %0 = bitcast i32 %x to float
+  tail call void @g_float(float %0)
+  ret void
+
+; Forwarding a bitcasted value works too.
+; CHECK-LABEL: f_i32
+; CHECK-NOT:   mov
+; CHECK:       jmp g_float
+}
Index: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
@@ -3645,6 +3645,26 @@
                          MachineFrameInfo *MFI, const MachineRegisterInfo *MRI,
                          const X86InstrInfo *TII, const CCValAssign &VA) {
   unsigned Bytes = Arg.getValueType().getSizeInBits() / 8;
+
+  for (;;) {
+    // Look through nodes that don't alter the bits of the incoming value.
+    unsigned Op = Arg.getOpcode();
+    if (Op == ISD::ZERO_EXTEND || Op == ISD::ANY_EXTEND || Op == ISD::BITCAST) {
+      Arg = Arg.getOperand(0);
+      continue;
+    }
+    if (Op == ISD::TRUNCATE) {
+      const SDValue &TruncInput = Arg.getOperand(0);
+      if (TruncInput.getOpcode() == ISD::AssertZext &&
+          cast<VTSDNode>(TruncInput.getOperand(1))->getVT() ==
+              Arg.getValueType()) {
+        Arg = TruncInput.getOperand(0);
+        continue;
+      }
+    }
+    break;
+  }
+
   int FI = INT_MAX;
   if (Arg.getOpcode() == ISD::CopyFromReg) {
     unsigned VR = cast<RegisterSDNode>(Arg.getOperand(1))->getReg();


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