[compiler-rt] r262483 - [TSAN] Fix test java_race_pc
Sagar Thakur via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 2 05:53:22 PST 2016
Author: slthakur
Date: Wed Mar 2 07:53:22 2016
New Revision: 262483
URL: http://llvm.org/viewvc/llvm-project?rev=262483&view=rev
Log:
[TSAN] Fix test java_race_pc
Incremented the pc for each architecture in accordance with StackTrace:GetPreviousInstructionPC
Reviewers: samsonov, dvyukov
Subscribers: llvm-commits, mohit.bhakkad, jaydeep
Differential: http://reviews.llvm.org/D17802
Modified:
compiler-rt/trunk/test/tsan/java_race_pc.cc
compiler-rt/trunk/test/tsan/test.h
Modified: compiler-rt/trunk/test/tsan/java_race_pc.cc
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/tsan/java_race_pc.cc?rev=262483&r1=262482&r2=262483&view=diff
==============================================================================
--- compiler-rt/trunk/test/tsan/java_race_pc.cc (original)
+++ compiler-rt/trunk/test/tsan/java_race_pc.cc Wed Mar 2 07:53:22 2016
@@ -13,7 +13,7 @@ void barbaz() {
void *Thread(void *p) {
barrier_wait(&barrier);
- __tsan_read1_pc((jptr)p, (jptr)foobar + 1);
+ __tsan_read1_pc((jptr)p, (jptr)foobar + kPCInc);
return 0;
}
@@ -26,7 +26,7 @@ int main() {
__tsan_java_alloc(jheap, kBlockSize);
pthread_t th;
pthread_create(&th, 0, Thread, (void*)jheap);
- __tsan_write1_pc((jptr)jheap, (jptr)barbaz + 1);
+ __tsan_write1_pc((jptr)jheap, (jptr)barbaz + kPCInc);
barrier_wait(&barrier);
pthread_join(th, 0);
__tsan_java_free(jheap, kBlockSize);
Modified: compiler-rt/trunk/test/tsan/test.h
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/tsan/test.h?rev=262483&r1=262482&r2=262483&view=diff
==============================================================================
--- compiler-rt/trunk/test/tsan/test.h (original)
+++ compiler-rt/trunk/test/tsan/test.h Wed Mar 2 07:53:22 2016
@@ -67,3 +67,13 @@ unsigned long long monotonic_clock_ns()
return (unsigned long long)t.tv_sec * 1000000000ull + t.tv_nsec;
}
#endif
+
+//The const kPCInc must be in sync with StackTrace::GetPreviousInstructionPc
+#if defined(__powerpc64__)
+// PCs are always 4 byte aligned.
+const int kPCInc = 4;
+#elif defined(__sparc__) || defined(__mips__)
+const int kPCInc = 8;
+#else
+const int kPCInc = 1;
+#endif
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