[PATCH] D17711: Fix for PR 26617 (disable scalar-to-vector conversions using direct moves for 32-bit targets)

[Nemanja Ivanovic via llvm-commits]

nemanjai added inline comments.

================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:560
@@ -559,3 +559,3 @@
       }
-      if (Subtarget.hasDirectMove()) {
+      if (Subtarget.hasDirectMove() && Subtarget.use64BitRegs()) {
         setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i8, Legal);
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kbarton wrote:
> The definition of use64BitRegs is confusing to me.
> Could you use Subtarget.isPPC64() instead? We basically only want to do this when we are in 64-bit mode, as I understand it. 
I only used this because it most closely encapsulates the conditions under which we aren't able to perform these actions. However, I think the simplest thing would indeed be to use Subtarget.isPPC64() (or even the local isPPC64) instead. I'll change it and test it prior to committing.

I'll change it to:
  if (Subtarget.hasDirectMove() && isPPC64)


Repository:
  rL LLVM

http://reviews.llvm.org/D17711