[llvm] r262446 - DAGCombiner: Make sure an integer is being truncated

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Tue Mar  1 19:36:51 2016
New Revision: 262446

URL: http://llvm.org/viewvc/llvm-project?rev=262446&view=rev
Log:
DAGCombiner: Make sure an integer is being truncated

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/AMDGPU/extractelt-to-trunc.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=262446&r1=262445&r2=262446&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Mar  1 19:36:51 2016
@@ -12198,7 +12198,7 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR
 
   // extract_vector_elt (v2i32 (bitcast i64:x)), 0 -> i32 (trunc i64:x)
   if (ConstEltNo && InVec.getOpcode() == ISD::BITCAST && InVec.hasOneUse() &&
-      ConstEltNo->isNullValue()) {
+      ConstEltNo->isNullValue() && VT.isInteger()) {
     SDValue BCSrc = InVec.getOperand(0);
     if (BCSrc.getValueType().isScalarInteger())
       return DAG.getNode(ISD::TRUNCATE, SDLoc(N), NVT, BCSrc);

Modified: llvm/trunk/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/extractelt-to-trunc.ll?rev=262446&r1=262445&r2=262446&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/extractelt-to-trunc.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/extractelt-to-trunc.ll Tue Mar  1 19:36:51 2016
@@ -13,5 +13,32 @@ define void @bitcast_int_to_vector_extra
    %val.bc = bitcast i64 %add to <2 x i32>
    %extract = extractelement <2 x i32> %val.bc, i32 0
    store i32 %extract, i32 addrspace(1)* %out
-  ret void
+   ret void
+}
+
+; GCN-LABEL: {{^}}bitcast_fp_to_vector_extract_0:
+; GCN: buffer_load_dwordx2
+; GCN: v_add_f64
+; GCN: buffer_store_dword v
+define void @bitcast_fp_to_vector_extract_0(i32 addrspace(1)* %out, double addrspace(1)* %in, double %b) {
+   %a = load double, double addrspace(1)* %in
+   %add = fadd double %a, %b
+   %val.bc = bitcast double %add to <2 x i32>
+   %extract = extractelement <2 x i32> %val.bc, i32 0
+   store i32 %extract, i32 addrspace(1)* %out
+   ret void
+}
+
+; GCN-LABEL: {{^}}bitcast_int_to_fpvector_extract_0:
+; GCN: buffer_load_dwordx2
+; GCN: v_add_i32
+; GCN: v_addc_u32
+; GCN: buffer_store_dword
+define void @bitcast_int_to_fpvector_extract_0(float addrspace(1)* %out, i64 addrspace(1)* %in, i64 %b) {
+   %a = load i64, i64 addrspace(1)* %in
+   %add = add i64 %a, %b
+   %val.bc = bitcast i64 %add to <2 x float>
+   %extract = extractelement <2 x float> %val.bc, i32 0
+   store float %extract, float addrspace(1)* %out
+   ret void
 }