[PATCH] D17782: [X86] Permit reading of the FLAGS register without it being previously defined
David Majnemer via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 1 14:19:37 PST 2016
majnemer created this revision.
majnemer added reviewers: rnk, MatzeB.
majnemer added a subscriber: llvm-commits.
We modeled the RDFLAGS{32,64} operations as "using" {E,R}FLAGS.
While technically correct, this is not be desirable for folks who want
to examine aspects of the FLAGS register which are not related to
computation like whether or not CPUID is a valid instruction.
http://reviews.llvm.org/D17782
Files:
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrInfo.td
test/CodeGen/X86/x86-64-flags-intrinsics.ll
test/CodeGen/X86/x86-flags-intrinsics.ll
Index: test/CodeGen/X86/x86-flags-intrinsics.ll
===================================================================
--- test/CodeGen/X86/x86-flags-intrinsics.ll
+++ test/CodeGen/X86/x86-flags-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target triple = "i686-pc-win32"
declare i32 @llvm.x86.flags.read.u32()
Index: test/CodeGen/X86/x86-64-flags-intrinsics.ll
===================================================================
--- test/CodeGen/X86/x86-64-flags-intrinsics.ll
+++ test/CodeGen/X86/x86-64-flags-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target triple = "x86_64-pc-win32"
declare i64 @llvm.x86.flags.read.u64()
Index: lib/Target/X86/X86InstrInfo.td
===================================================================
--- lib/Target/X86/X86InstrInfo.td
+++ lib/Target/X86/X86InstrInfo.td
@@ -1122,12 +1122,12 @@
let mayLoad = 1, mayStore = 1, usesCustomInserter = 1,
SchedRW = [WriteRMW], Defs = [ESP] in {
- let Uses = [ESP, EFLAGS] in
+ let Uses = [ESP] in
def RDFLAGS32 : PseudoI<(outs GR32:$dst), (ins),
[(set GR32:$dst, (int_x86_flags_read_u32))]>,
Requires<[Not64BitMode]>;
- let Uses = [RSP, EFLAGS] in
+ let Uses = [RSP] in
def RDFLAGS64 : PseudoI<(outs GR64:$dst), (ins),
[(set GR64:$dst, (int_x86_flags_read_u64))]>,
Requires<[In64BitMode]>;
Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -23255,7 +23255,9 @@
MI->getOpcode() == X86::RDFLAGS32 ? X86::PUSHF32 : X86::PUSHF64;
unsigned Pop =
MI->getOpcode() == X86::RDFLAGS32 ? X86::POP32r : X86::POP64r;
- BuildMI(*BB, MI, DL, TII->get(PushF));
+ MachineInstr *Push = BuildMI(*BB, MI, DL, TII->get(PushF));
+ // Permit reads of the FLAGS register without it being defined.
+ Push->getOperand(2).setIsUndef();
BuildMI(*BB, MI, DL, TII->get(Pop), MI->getOperand(0).getReg());
MI->eraseFromParent(); // The pseudo is gone now.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D17782.49550.patch
Type: text/x-patch
Size: 2233 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160301/5e1005af/attachment.bin>
More information about the llvm-commits
mailing list