[llvm] r262266 - Simplify some boolean conditional return statements in AArch64.
Eric Christopher via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 29 14:50:49 PST 2016
Author: echristo
Date: Mon Feb 29 16:50:49 2016
New Revision: 262266
URL: http://llvm.org/viewvc/llvm-project?rev=262266&view=rev
Log:
Simplify some boolean conditional return statements in AArch64.
http://reviews.llvm.org/D9979
Patch by Richard Thomson (and some conflict resolution by me).
Modified:
llvm/trunk/lib/Target/AArch64/AArch64AddressTypePromotion.cpp
llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp
llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp
llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/trunk/lib/Target/AArch64/AArch64PromoteConstant.cpp
llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp
Modified: llvm/trunk/lib/Target/AArch64/AArch64AddressTypePromotion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64AddressTypePromotion.cpp?rev=262266&r1=262265&r2=262266&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64AddressTypePromotion.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64AddressTypePromotion.cpp Mon Feb 29 16:50:49 2016
@@ -207,9 +207,7 @@ bool AArch64AddressTypePromotion::should
}
static bool shouldSExtOperand(const Instruction *Inst, int OpIdx) {
- if (isa<SelectInst>(Inst) && OpIdx == 0)
- return false;
- return true;
+ return !(isa<SelectInst>(Inst) && OpIdx == 0);
}
bool
Modified: llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp?rev=262266&r1=262265&r2=262266&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp Mon Feb 29 16:50:49 2016
@@ -946,10 +946,7 @@ bool AArch64FastISel::isValueAvailable(c
return true;
const auto *I = cast<Instruction>(V);
- if (FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB)
- return true;
-
- return false;
+ return FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB;
}
bool AArch64FastISel::simplifyAddress(Address &Addr, MVT VT) {
Modified: llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp?rev=262266&r1=262265&r2=262266&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp Mon Feb 29 16:50:49 2016
@@ -130,9 +130,7 @@ bool AArch64FrameLowering::canUseRedZone
// Note: currently hasFP() is always true for hasCalls(), but that's an
// implementation detail of the current code, not a strict requirement,
// so stay safe here and check both.
- if (MFI->hasCalls() || hasFP(MF) || NumBytes > 128)
- return false;
- return true;
+ return !(MFI->hasCalls() || hasFP(MF) || NumBytes > 128);
}
/// hasFP - Return true if the specified function should have a dedicated frame
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp?rev=262266&r1=262265&r2=262266&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp Mon Feb 29 16:50:49 2016
@@ -328,9 +328,7 @@ static AArch64_AM::ShiftExtendType getSh
bool AArch64DAGToDAGISel::isWorthFolding(SDValue V) const {
// it hurts if the value is used at least twice, unless we are optimizing
// for code size.
- if (ForCodeSize || V.hasOneUse())
- return true;
- return false;
+ return ForCodeSize || V.hasOneUse();
}
/// SelectShiftedRegister - Select a "shifted register" operand. If the value
@@ -797,10 +795,7 @@ bool AArch64DAGToDAGISel::SelectExtended
if (ShiftVal != 0 && ShiftVal != LegalShiftVal)
return false;
- if (isWorthFolding(N))
- return true;
-
- return false;
+ return isWorthFolding(N);
}
bool AArch64DAGToDAGISel::SelectAddrModeWRO(SDValue N, unsigned Size,
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=262266&r1=262265&r2=262266&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Mon Feb 29 16:50:49 2016
@@ -2812,9 +2812,7 @@ bool AArch64TargetLowering::isEligibleFo
return false;
if (getTargetMachine().Options.GuaranteedTailCallOpt) {
- if (IsTailCallConvention(CalleeCC) && CCMatch)
- return true;
- return false;
+ return IsTailCallConvention(CalleeCC) && CCMatch;
}
// Externally-defined functions with weak linkage should not be
@@ -6974,12 +6972,10 @@ bool AArch64TargetLowering::isProfitable
const DataLayout &DL = I->getModule()->getDataLayout();
EVT VT = getValueType(DL, User->getOperand(0)->getType());
- if (isFMAFasterThanFMulAndFAdd(VT) &&
- isOperationLegalOrCustom(ISD::FMA, VT) &&
- (Options.AllowFPOpFusion == FPOpFusion::Fast || Options.UnsafeFPMath))
- return false;
-
- return true;
+ return !(isFMAFasterThanFMulAndFAdd(VT) &&
+ isOperationLegalOrCustom(ISD::FMA, VT) &&
+ (Options.AllowFPOpFusion == FPOpFusion::Fast ||
+ Options.UnsafeFPMath));
}
// All 32-bit GPR operations implicitly zero the high-half of the corresponding
@@ -7282,9 +7278,7 @@ EVT AArch64TargetLowering::getOptimalMem
bool AArch64TargetLowering::isLegalAddImmediate(int64_t Immed) const {
// Same encoding for add/sub, just flip the sign.
Immed = std::abs(Immed);
- if ((Immed >> 12) == 0 || ((Immed & 0xfff) == 0 && Immed >> 24 == 0))
- return true;
- return false;
+ return ((Immed >> 12) == 0 || ((Immed & 0xfff) == 0 && Immed >> 24 == 0));
}
// Integer comparisons are implemented with ADDS/SUBS, so the range of valid
@@ -7341,10 +7335,8 @@ bool AArch64TargetLowering::isLegalAddre
// Check reg1 + SIZE_IN_BYTES * reg2 and reg1 + reg2
- if (!AM.Scale || AM.Scale == 1 ||
- (AM.Scale > 0 && (uint64_t)AM.Scale == NumBytes))
- return true;
- return false;
+ return !AM.Scale || AM.Scale == 1 ||
+ (AM.Scale > 0 && (uint64_t)AM.Scale == NumBytes);
}
int AArch64TargetLowering::getScalingFactorCost(const DataLayout &DL,
@@ -9309,10 +9301,8 @@ bool checkValueWidth(SDValue V, unsigned
}
case ISD::Constant:
case ISD::TargetConstant: {
- if (std::abs(cast<ConstantSDNode>(V.getNode())->getSExtValue()) <
- 1LL << (width - 1))
- return true;
- return false;
+ return std::abs(cast<ConstantSDNode>(V.getNode())->getSExtValue()) <
+ 1LL << (width - 1);
}
}
@@ -9922,10 +9912,7 @@ bool AArch64TargetLowering::isUsedByRetu
// return instructions to help enable tail call optimizations for this
// instruction.
bool AArch64TargetLowering::mayBeEmittedAsTailCall(CallInst *CI) const {
- if (!CI->isTailCall())
- return false;
-
- return true;
+ return CI->isTailCall();
}
bool AArch64TargetLowering::getIndexedAddressParts(SDNode *Op, SDValue &Base,
Modified: llvm/trunk/lib/Target/AArch64/AArch64PromoteConstant.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64PromoteConstant.cpp?rev=262266&r1=262265&r2=262266&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64PromoteConstant.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64PromoteConstant.cpp Mon Feb 29 16:50:49 2016
@@ -285,10 +285,7 @@ static bool shouldConvertUse(const Const
// Do not mess with inline asm.
const CallInst *CI = dyn_cast<const CallInst>(Instr);
- if (CI && isa<const InlineAsm>(CI->getCalledValue()))
- return false;
-
- return true;
+ return !(CI && isa<const InlineAsm>(CI->getCalledValue()));
}
/// Check if the given Cst should be converted into
Modified: llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp?rev=262266&r1=262265&r2=262266&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp Mon Feb 29 16:50:49 2016
@@ -190,9 +190,7 @@ bool AArch64RegisterInfo::hasBasePointer
// If it's wrong, we'll materialize the constant and still get to the
// object; it's just suboptimal. Negative offsets use the unscaled
// load/store instructions, which have a 9-bit signed immediate.
- if (MFI->getLocalFrameSize() < 256)
- return false;
- return true;
+ return MFI->getLocalFrameSize() >= 256;
}
return false;
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