[PATCH] D17463: [AArch64] Fix isLegalAddImmediate() to return true for valid negative values.

[Geoff Berry via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL262248: [AArch64] Fix isLegalAddImmediate() to return true for valid negative values. (authored by gberry).

Changed prior to commit:
  http://reviews.llvm.org/D17463?vs=48545&id=49405#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D17463

Files:
  llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/trunk/test/CodeGen/AArch64/neg-imm.ll

Index: llvm/trunk/test/CodeGen/AArch64/neg-imm.ll
===================================================================
--- llvm/trunk/test/CodeGen/AArch64/neg-imm.ll
+++ llvm/trunk/test/CodeGen/AArch64/neg-imm.ll
@@ -0,0 +1,46 @@
+; RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs -o - %s | FileCheck %s
+; LSR used to pick a sub-optimal solution due to the target responding
+; conservatively to isLegalAddImmediate for negative values.
+
+declare void @foo(i32)
+
+define void @test(i32 %px) {
+; CHECK-LABEL: test:
+; CHECK: // %entry
+; CHECK: subs
+; CHECK-NEXT: csel
+entry:
+  %sub = add nsw i32 %px, -1
+  %cmp = icmp slt i32 %px, 1
+  %.sub = select i1 %cmp, i32 0, i32 %sub
+  br label %for.body
+
+for.body:
+; CHECK: // %for.body
+; CHECK:  cmp
+; CHECK-NEXT:  b.eq
+; CHECK: // %if.then3
+  %x.015 = phi i32 [ %inc, %for.inc ], [ %.sub, %entry ]
+  %cmp2 = icmp eq i32 %x.015, %px
+  br i1 %cmp2, label %for.inc, label %if.then3
+
+if.then3:
+  tail call void @foo(i32 %x.015)
+  br label %for.inc
+
+for.inc:
+; CHECK: // %for.inc
+; CHECK:  add
+; CHECK-NEXT:  cmp
+; CHECK:  b.le
+; CHECK: // %for.cond.cleanup
+  %inc = add nsw i32 %x.015, 1
+  %cmp1 = icmp sgt i32 %x.015, %px
+  br i1 %cmp1, label %for.cond.cleanup.loopexit, label %for.body
+
+for.cond.cleanup.loopexit:
+  br label %for.cond.cleanup
+
+for.cond.cleanup:
+  ret void
+}
Index: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -7280,16 +7280,16 @@
 
 // 12-bit optionally shifted immediates are legal for adds.
 bool AArch64TargetLowering::isLegalAddImmediate(int64_t Immed) const {
+  // Same encoding for add/sub, just flip the sign.
+  Immed = std::abs(Immed);
   if ((Immed >> 12) == 0 || ((Immed & 0xfff) == 0 && Immed >> 24 == 0))
     return true;
   return false;
 }
 
 // Integer comparisons are implemented with ADDS/SUBS, so the range of valid
 // immediates is the same as for an add or a sub.
 bool AArch64TargetLowering::isLegalICmpImmediate(int64_t Immed) const {
-  if (Immed < 0)
-    Immed *= -1;
   return isLegalAddImmediate(Immed);
 }
 


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