[llvm] r262141 - WIP: CodeGen: Use MachineInstr& in MachineInstrBundle.h, NFC
Duncan P. N. Exon Smith via llvm-commits
llvm-commits at lists.llvm.org
Sat Feb 27 11:09:48 PST 2016
> On 2016-Feb-27, at 09:05, Duncan P. N. Exon Smith via llvm-commits <llvm-commits at lists.llvm.org> wrote:
>
> Author: dexonsmith
> Date: Sat Feb 27 11:05:33 2016
> New Revision: 262141
>
> URL: http://llvm.org/viewvc/llvm-project?rev=262141&view=rev
> Log:
> WIP: CodeGen: Use MachineInstr& in MachineInstrBundle.h, NFC
Actually not a WIP, I just forgot to update the commit message once
I finished the commit :(.
>
> Update APIs in MachineInstrBundle.h to take and return MachineInstr&
> instead of MachineInstr* when the instruction cannot be null. Besides
> being a nice cleanup, this is tacking toward a fix for PR26753.
>
> Modified:
> llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h
> llvm/trunk/include/llvm/CodeGen/MachineInstrBundle.h
> llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
> llvm/trunk/include/llvm/CodeGen/SlotIndexes.h
> llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
> llvm/trunk/lib/CodeGen/IfConversion.cpp
> llvm/trunk/lib/CodeGen/InlineSpiller.cpp
> llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
> llvm/trunk/lib/CodeGen/LivePhysRegs.cpp
> llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
> llvm/trunk/lib/CodeGen/MachineInstr.cpp
> llvm/trunk/lib/CodeGen/MachineVerifier.cpp
> llvm/trunk/lib/CodeGen/RegisterPressure.cpp
> llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
> llvm/trunk/lib/Target/AArch64/AArch64ConditionalCompares.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonGenInsert.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonGenMux.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonGenPredicate.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h Sat Feb 27 11:05:33 2016
> @@ -447,7 +447,7 @@ public:
> /// Create an MIBundleBuilder representing an existing instruction or bundle
> /// that has MI as its head.
> explicit MIBundleBuilder(MachineInstr *MI)
> - : MBB(*MI->getParent()), Begin(MI), End(getBundleEnd(MI)) {}
> + : MBB(*MI->getParent()), Begin(MI), End(getBundleEnd(*MI)) {}
>
> /// Return a reference to the basic block containing this bundle.
> MachineBasicBlock &getMBB() const { return MBB; }
>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineInstrBundle.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstrBundle.h?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/MachineInstrBundle.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/MachineInstrBundle.h Sat Feb 27 11:05:33 2016
> @@ -43,23 +43,22 @@ bool finalizeBundles(MachineFunction &MF
>
> /// getBundleStart - Returns the first instruction in the bundle containing MI.
> ///
> -inline MachineInstr *getBundleStart(MachineInstr *MI) {
> +inline MachineInstr &getBundleStart(MachineInstr &MI) {
> MachineBasicBlock::instr_iterator I(MI);
> while (I->isBundledWithPred())
> --I;
> - return &*I;
> + return *I;
> }
>
> -inline const MachineInstr *getBundleStart(const MachineInstr *MI) {
> +inline const MachineInstr &getBundleStart(const MachineInstr &MI) {
> MachineBasicBlock::const_instr_iterator I(MI);
> while (I->isBundledWithPred())
> --I;
> - return &*I;
> + return *I;
> }
>
> /// Return an iterator pointing beyond the bundle containing MI.
> -inline MachineBasicBlock::instr_iterator
> -getBundleEnd(MachineInstr *MI) {
> +inline MachineBasicBlock::instr_iterator getBundleEnd(MachineInstr &MI) {
> MachineBasicBlock::instr_iterator I(MI);
> while (I->isBundledWithSucc())
> ++I;
> @@ -68,7 +67,7 @@ getBundleEnd(MachineInstr *MI) {
>
> /// Return an iterator pointing beyond the bundle containing MI.
> inline MachineBasicBlock::const_instr_iterator
> -getBundleEnd(const MachineInstr *MI) {
> +getBundleEnd(const MachineInstr &MI) {
> MachineBasicBlock::const_instr_iterator I(MI);
> while (I->isBundledWithSucc())
> ++I;
> @@ -114,12 +113,12 @@ protected:
> /// @param MI The instruction to examine.
> /// @param WholeBundle When true, visit all operands on the entire bundle.
> ///
> - explicit MachineOperandIteratorBase(MachineInstr *MI, bool WholeBundle) {
> + explicit MachineOperandIteratorBase(MachineInstr &MI, bool WholeBundle) {
> if (WholeBundle) {
> - InstrI = getBundleStart(MI)->getIterator();
> - InstrE = MI->getParent()->instr_end();
> + InstrI = getBundleStart(MI).getIterator();
> + InstrE = MI.getParent()->instr_end();
> } else {
> - InstrI = InstrE = MI->getIterator();
> + InstrI = InstrE = MI.getIterator();
> ++InstrE;
> }
> OpI = InstrI->operands_begin();
> @@ -216,7 +215,7 @@ public:
> ///
> class MIOperands : public MachineOperandIteratorBase {
> public:
> - MIOperands(MachineInstr *MI) : MachineOperandIteratorBase(MI, false) {}
> + MIOperands(MachineInstr &MI) : MachineOperandIteratorBase(MI, false) {}
> MachineOperand &operator* () const { return deref(); }
> MachineOperand *operator->() const { return &deref(); }
> };
> @@ -225,8 +224,8 @@ public:
> ///
> class ConstMIOperands : public MachineOperandIteratorBase {
> public:
> - ConstMIOperands(const MachineInstr *MI)
> - : MachineOperandIteratorBase(const_cast<MachineInstr*>(MI), false) {}
> + ConstMIOperands(const MachineInstr &MI)
> + : MachineOperandIteratorBase(const_cast<MachineInstr &>(MI), false) {}
> const MachineOperand &operator* () const { return deref(); }
> const MachineOperand *operator->() const { return &deref(); }
> };
> @@ -236,7 +235,7 @@ public:
> ///
> class MIBundleOperands : public MachineOperandIteratorBase {
> public:
> - MIBundleOperands(MachineInstr *MI) : MachineOperandIteratorBase(MI, true) {}
> + MIBundleOperands(MachineInstr &MI) : MachineOperandIteratorBase(MI, true) {}
> MachineOperand &operator* () const { return deref(); }
> MachineOperand *operator->() const { return &deref(); }
> };
> @@ -246,8 +245,8 @@ public:
> ///
> class ConstMIBundleOperands : public MachineOperandIteratorBase {
> public:
> - ConstMIBundleOperands(const MachineInstr *MI)
> - : MachineOperandIteratorBase(const_cast<MachineInstr*>(MI), true) {}
> + ConstMIBundleOperands(const MachineInstr &MI)
> + : MachineOperandIteratorBase(const_cast<MachineInstr &>(MI), true) {}
> const MachineOperand &operator* () const { return deref(); }
> const MachineOperand *operator->() const { return &deref(); }
> };
>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h Sat Feb 27 11:05:33 2016
> @@ -835,10 +835,10 @@ public:
> advance();
> } while (Op && Op->getParent() == P);
> } else if (ByBundle) {
> - MachineInstr *P = getBundleStart(Op->getParent());
> + MachineInstr &P = getBundleStart(*Op->getParent());
> do {
> advance();
> - } while (Op && getBundleStart(Op->getParent()) == P);
> + } while (Op && &getBundleStart(*Op->getParent()) == &P);
> }
>
> return *this;
> @@ -937,10 +937,10 @@ public:
> advance();
> } while (Op && Op->getParent() == P);
> } else if (ByBundle) {
> - MachineInstr *P = getBundleStart(Op->getParent());
> + MachineInstr &P = getBundleStart(*Op->getParent());
> do {
> advance();
> - } while (Op && getBundleStart(Op->getParent()) == P);
> + } while (Op && &getBundleStart(*Op->getParent()) == &P);
> }
>
> return *this;
> @@ -952,15 +952,12 @@ public:
> // Retrieve a reference to the current operand.
> MachineInstr &operator*() const {
> assert(Op && "Cannot dereference end iterator!");
> - if (ByBundle) return *(getBundleStart(Op->getParent()));
> + if (ByBundle)
> + return getBundleStart(*Op->getParent());
> return *Op->getParent();
> }
>
> - MachineInstr *operator->() const {
> - assert(Op && "Cannot dereference end iterator!");
> - if (ByBundle) return getBundleStart(Op->getParent());
> - return Op->getParent();
> - }
> + MachineInstr *operator->() const { return &operator*(); }
> };
> };
>
>
> Modified: llvm/trunk/include/llvm/CodeGen/SlotIndexes.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SlotIndexes.h?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/SlotIndexes.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/SlotIndexes.h Sat Feb 27 11:05:33 2016
> @@ -421,7 +421,7 @@ namespace llvm {
> /// Returns the base index for the given instruction.
> SlotIndex getInstructionIndex(const MachineInstr &MI) const {
> // Instructions inside a bundle have the same number as the bundle itself.
> - Mi2IndexMap::const_iterator itr = mi2iMap.find(getBundleStart(&MI));
> + Mi2IndexMap::const_iterator itr = mi2iMap.find(&getBundleStart(MI));
> assert(itr != mi2iMap.end() && "Instruction not found in maps.");
> return itr->second;
> }
>
> Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original)
> +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Sat Feb 27 11:05:33 2016
> @@ -2525,7 +2525,7 @@ isBlockOnlyReachableByFallthrough(const
> // If we are the operands of one of the branches, this is not a fall
> // through. Note that targets with delay slots will usually bundle
> // terminators with the delay slot instruction.
> - for (ConstMIBundleOperands OP(&MI); OP.isValid(); ++OP) {
> + for (ConstMIBundleOperands OP(MI); OP.isValid(); ++OP) {
> if (OP->isJTI())
> return false;
> if (OP->isMBB() && OP->getMBB() == MBB)
>
> Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/IfConversion.cpp (original)
> +++ llvm/trunk/lib/CodeGen/IfConversion.cpp Sat Feb 27 11:05:33 2016
> @@ -1049,7 +1049,7 @@ static void UpdatePredRedefs(MachineInst
> * Remove kill flags from operands with a registers in the @p DontKill set.
> */
> static void RemoveKills(MachineInstr &MI, const LivePhysRegs &DontKill) {
> - for (MIBundleOperands O(&MI); O.isValid(); ++O) {
> + for (MIBundleOperands O(MI); O.isValid(); ++O) {
> if (!O->isReg() || !O->isKill())
> continue;
> if (DontKill.contains(O->getReg()))
>
> Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original)
> +++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Sat Feb 27 11:05:33 2016
> @@ -855,7 +855,7 @@ bool InlineSpiller::reMaterializeFor(Liv
> // Analyze instruction
> SmallVector<std::pair<MachineInstr *, unsigned>, 8> Ops;
> MIBundleOperands::VirtRegInfo RI =
> - MIBundleOperands(MI).analyzeVirtReg(VirtReg.reg, &Ops);
> + MIBundleOperands(*MI).analyzeVirtReg(VirtReg.reg, &Ops);
>
> if (!RI.Reads)
> return false;
> @@ -1121,7 +1121,7 @@ foldMemoryOperand(ArrayRef<std::pair<Mac
> return false;
>
> // Remove LIS for any dead defs in the original MI not in FoldMI.
> - for (MIBundleOperands MO(MI); MO.isValid(); ++MO) {
> + for (MIBundleOperands MO(*MI); MO.isValid(); ++MO) {
> if (!MO->isReg())
> continue;
> unsigned Reg = MO->getReg();
> @@ -1133,7 +1133,7 @@ foldMemoryOperand(ArrayRef<std::pair<Mac
> if (MO->isUse())
> continue;
> MIBundleOperands::PhysRegInfo RI =
> - MIBundleOperands(FoldMI).analyzePhysReg(Reg, &TRI);
> + MIBundleOperands(*FoldMI).analyzePhysReg(Reg, &TRI);
> if (RI.FullyDefined)
> continue;
> // FoldMI does not define this physreg. Remove the LI segment.
> @@ -1248,7 +1248,7 @@ void InlineSpiller::spillAroundUses(unsi
> // Analyze instruction.
> SmallVector<std::pair<MachineInstr*, unsigned>, 8> Ops;
> MIBundleOperands::VirtRegInfo RI =
> - MIBundleOperands(MI).analyzeVirtReg(Reg, &Ops);
> + MIBundleOperands(*MI).analyzeVirtReg(Reg, &Ops);
>
> // Find the slot index where this instruction reads and writes OldLI.
> // This is usually the def slot, except for tied early clobbers.
>
> Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
> +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Sat Feb 27 11:05:33 2016
> @@ -1044,7 +1044,7 @@ private:
> // Kill flags shouldn't be used while live intervals exist, they will be
> // reinserted by VirtRegRewriter.
> if (MachineInstr *KillMI = LIS.getInstructionFromIndex(OldIdxIn->end))
> - for (MIBundleOperands MO(KillMI); MO.isValid(); ++MO)
> + for (MIBundleOperands MO(*KillMI); MO.isValid(); ++MO)
> if (MO->isReg() && MO->isUse())
> MO->setIsKill(false);
>
> @@ -1380,7 +1380,7 @@ private:
> return Before;
>
> // Check if MII uses Reg.
> - for (MIBundleOperands MO(MII); MO.isValid(); ++MO)
> + for (MIBundleOperands MO(*MII); MO.isValid(); ++MO)
> if (MO->isReg() &&
> TargetRegisterInfo::isPhysicalRegister(MO->getReg()) &&
> TRI.hasRegUnit(MO->getReg(), Reg))
>
> Modified: llvm/trunk/lib/CodeGen/LivePhysRegs.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LivePhysRegs.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/LivePhysRegs.cpp (original)
> +++ llvm/trunk/lib/CodeGen/LivePhysRegs.cpp Sat Feb 27 11:05:33 2016
> @@ -43,7 +43,7 @@ void LivePhysRegs::removeRegsInMask(cons
> /// Remove Defs, add uses. This is the recommended way of calculating liveness.
> void LivePhysRegs::stepBackward(const MachineInstr &MI) {
> // Remove defined registers and regmask kills from the set.
> - for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
> + for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
> if (O->isReg()) {
> if (!O->isDef())
> continue;
> @@ -56,7 +56,7 @@ void LivePhysRegs::stepBackward(const Ma
> }
>
> // Add uses to the set.
> - for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
> + for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
> if (!O->isReg() || !O->readsReg() || O->isUndef())
> continue;
> unsigned Reg = O->getReg();
> @@ -73,7 +73,7 @@ void LivePhysRegs::stepBackward(const Ma
> void LivePhysRegs::stepForward(const MachineInstr &MI,
> SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers) {
> // Remove killed registers from the set.
> - for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
> + for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
> if (O->isReg()) {
> unsigned Reg = O->getReg();
> if (Reg == 0)
>
> Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Sat Feb 27 11:05:33 2016
> @@ -1199,7 +1199,7 @@ MachineBasicBlock::computeRegisterLivene
> --I;
>
> MachineOperandIteratorBase::PhysRegInfo Info =
> - ConstMIOperands(I).analyzePhysReg(Reg, TRI);
> + ConstMIOperands(*I).analyzePhysReg(Reg, TRI);
>
> // Defs happen after uses so they take precedence if both are present.
>
> @@ -1237,7 +1237,7 @@ MachineBasicBlock::computeRegisterLivene
> if (I != end()) {
> for (++I; I != end() && N > 0; ++I, --N) {
> MachineOperandIteratorBase::PhysRegInfo Info =
> - ConstMIOperands(I).analyzePhysReg(Reg, TRI);
> + ConstMIOperands(*I).analyzePhysReg(Reg, TRI);
>
> // Register is live when we read it here.
> if (Info.Read)
>
> Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Sat Feb 27 11:05:33 2016
> @@ -1188,7 +1188,7 @@ const TargetRegisterClass *MachineInstr:
> // Check every operands inside the bundle if we have
> // been asked to.
> if (ExploreBundle)
> - for (ConstMIBundleOperands OpndIt(this); OpndIt.isValid() && CurRC;
> + for (ConstMIBundleOperands OpndIt(*this); OpndIt.isValid() && CurRC;
> ++OpndIt)
> CurRC = OpndIt->getParent()->getRegClassConstraintEffectForVRegImpl(
> OpndIt.getOperandNo(), Reg, CurRC, TII, TRI);
>
> Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Sat Feb 27 11:05:33 2016
> @@ -1588,7 +1588,7 @@ void MachineVerifier::verifyLiveRangeVal
> if (Reg != 0) {
> bool hasDef = false;
> bool isEarlyClobber = false;
> - for (ConstMIBundleOperands MOI(MI); MOI.isValid(); ++MOI) {
> + for (ConstMIBundleOperands MOI(*MI); MOI.isValid(); ++MOI) {
> if (!MOI->isReg() || !MOI->isDef())
> continue;
> if (TargetRegisterInfo::isVirtualRegister(Reg)) {
> @@ -1727,7 +1727,7 @@ void MachineVerifier::verifyLiveRangeSeg
> // use, or a dead flag on a def.
> bool hasRead = false;
> bool hasSubRegDef = false;
> - for (ConstMIBundleOperands MOI(MI); MOI.isValid(); ++MOI) {
> + for (ConstMIBundleOperands MOI(*MI); MOI.isValid(); ++MOI) {
> if (!MOI->isReg() || MOI->getReg() != Reg)
> continue;
> if (LaneMask != 0 &&
>
> Modified: llvm/trunk/lib/CodeGen/RegisterPressure.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterPressure.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/RegisterPressure.cpp (original)
> +++ llvm/trunk/lib/CodeGen/RegisterPressure.cpp Sat Feb 27 11:05:33 2016
> @@ -438,7 +438,7 @@ class RegisterOperandsCollector {
> TrackLaneMasks(TrackLaneMasks), IgnoreDead(IgnoreDead) {}
>
> void collectInstr(const MachineInstr &MI) const {
> - for (ConstMIBundleOperands OperI(&MI); OperI.isValid(); ++OperI)
> + for (ConstMIBundleOperands OperI(MI); OperI.isValid(); ++OperI)
> collectOperand(*OperI);
>
> // Remove redundant physreg dead defs.
>
> Modified: llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp (original)
> +++ llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp Sat Feb 27 11:05:33 2016
> @@ -1201,7 +1201,7 @@ static void toggleBundleKillFlag(Machine
> // might set it on too many operands. We will clear as many flags as we
> // can though.
> MachineBasicBlock::instr_iterator Begin = MI->getIterator();
> - MachineBasicBlock::instr_iterator End = getBundleEnd(MI);
> + MachineBasicBlock::instr_iterator End = getBundleEnd(*MI);
> while (Begin != End) {
> for (MachineOperand &MO : (--End)->operands()) {
> if (!MO.isReg() || MO.isDef() || Reg != MO.getReg())
> @@ -1335,7 +1335,7 @@ void ScheduleDAGInstrs::fixupKills(Machi
> DEBUG(MI->dump());
> DEBUG(if (MI->getOpcode() == TargetOpcode::BUNDLE) {
> MachineBasicBlock::instr_iterator Begin = MI->getIterator();
> - MachineBasicBlock::instr_iterator End = getBundleEnd(MI);
> + MachineBasicBlock::instr_iterator End = getBundleEnd(*MI);
> while (++Begin != End)
> DEBUG(Begin->dump());
> });
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64ConditionalCompares.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ConditionalCompares.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64ConditionalCompares.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64ConditionalCompares.cpp Sat Feb 27 11:05:33 2016
> @@ -351,7 +351,7 @@ MachineInstr *SSACCmpConv::findConvertib
>
> // Check for flag reads and clobbers.
> MIOperands::PhysRegInfo PRI =
> - MIOperands(I).analyzePhysReg(AArch64::NZCV, TRI);
> + MIOperands(*I).analyzePhysReg(AArch64::NZCV, TRI);
>
> if (PRI.Read) {
> // The ccmp doesn't produce exactly the same flags as the original
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp Sat Feb 27 11:05:33 2016
> @@ -359,7 +359,7 @@ bool HexagonEarlyIfConversion::isValidCa
> // update the use of it after predication). PHI uses will be updated
> // to use a result of a MUX, and a MUX cannot be created for predicate
> // registers.
> - for (ConstMIOperands MO(&MI); MO.isValid(); ++MO) {
> + for (ConstMIOperands MO(MI); MO.isValid(); ++MO) {
> if (!MO->isReg() || !MO->isDef())
> continue;
> unsigned R = MO->getReg();
> @@ -377,7 +377,7 @@ bool HexagonEarlyIfConversion::isValidCa
>
>
> bool HexagonEarlyIfConversion::usesUndefVReg(const MachineInstr *MI) const {
> - for (ConstMIOperands MO(MI); MO.isValid(); ++MO) {
> + for (ConstMIOperands MO(*MI); MO.isValid(); ++MO) {
> if (!MO->isReg() || !MO->isUse())
> continue;
> unsigned R = MO->getReg();
> @@ -456,7 +456,7 @@ unsigned HexagonEarlyIfConversion::count
> const MachineBasicBlock *B) const {
> unsigned PredDefs = 0;
> for (auto &MI : *B) {
> - for (ConstMIOperands MO(&MI); MO.isValid(); ++MO) {
> + for (ConstMIOperands MO(MI); MO.isValid(); ++MO) {
> if (!MO->isReg() || !MO->isDef())
> continue;
> unsigned R = MO->getReg();
> @@ -721,7 +721,7 @@ void HexagonEarlyIfConversion::predicate
> assert(COpc);
> MachineInstrBuilder MIB = BuildMI(*ToB, At, DL, TII->get(COpc))
> .addReg(PredR);
> - for (MIOperands MO(MI); MO.isValid(); ++MO)
> + for (MIOperands MO(*MI); MO.isValid(); ++MO)
> MIB.addOperand(*MO);
>
> // Set memory references.
> @@ -980,7 +980,7 @@ void HexagonEarlyIfConversion::replacePh
> MachineBasicBlock *SB = *I;
> MachineBasicBlock::iterator P, N = SB->getFirstNonPHI();
> for (P = SB->begin(); P != N; ++P) {
> - MachineInstr *PN = &*P;
> + MachineInstr &PN = *P;
> for (MIOperands MO(PN); MO.isValid(); ++MO)
> if (MO->isMBB() && MO->getMBB() == OldB)
> MO->setMBB(NewB);
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonGenInsert.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonGenInsert.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonGenInsert.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonGenInsert.cpp Sat Feb 27 11:05:33 2016
> @@ -1446,7 +1446,7 @@ bool HexagonGenInsert::removeDeadCode(Ma
>
> bool AllDead = true;
> SmallVector<unsigned,2> Regs;
> - for (ConstMIOperands Op(MI); Op.isValid(); ++Op) {
> + for (ConstMIOperands Op(*MI); Op.isValid(); ++Op) {
> if (!Op->isReg() || !Op->isDef())
> continue;
> unsigned R = Op->getReg();
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonGenMux.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonGenMux.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonGenMux.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonGenMux.cpp Sat Feb 27 11:05:33 2016
> @@ -128,7 +128,7 @@ void HexagonGenMux::getDefsUses(const Ma
> expandReg(*R++, Uses);
>
> // Look over all operands, and collect explicit defs and uses.
> - for (ConstMIOperands Mo(MI); Mo.isValid(); ++Mo) {
> + for (ConstMIOperands Mo(*MI); Mo.isValid(); ++Mo) {
> if (!Mo->isReg() || Mo->isImplicit())
> continue;
> unsigned R = Mo->getReg();
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonGenPredicate.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonGenPredicate.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonGenPredicate.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonGenPredicate.cpp Sat Feb 27 11:05:33 2016
> @@ -332,7 +332,7 @@ bool HexagonGenPredicate::isScalarPred(R
> case Hexagon::C4_or_orn:
> case Hexagon::C2_xor:
> // Add operands to the queue.
> - for (ConstMIOperands Mo(DefI); Mo.isValid(); ++Mo)
> + for (ConstMIOperands Mo(*DefI); Mo.isValid(); ++Mo)
> if (Mo->isReg() && Mo->isUse())
> WorkQ.push(Register(Mo->getReg()));
> break;
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp?rev=262141&r1=262140&r2=262141&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp Sat Feb 27 11:05:33 2016
> @@ -4070,7 +4070,7 @@ unsigned HexagonInstrInfo::nonDbgBundleS
> assert(BundleHead->isBundle() && "Not a bundle header");
> auto MII = BundleHead.getInstrIterator();
> // Skip the bundle header.
> - return nonDbgMICount(++MII, getBundleEnd(BundleHead));
> + return nonDbgMICount(++MII, getBundleEnd(*BundleHead));
> }
>
>
>
>
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