[llvm] r262121 - AMDGPU: Split vi-insts subtarget feature

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Sat Feb 27 02:53:55 2016
New Revision: 262121

URL: http://llvm.org/viewvc/llvm-project?rev=262121&view=rev
Log:
AMDGPU: Split vi-insts subtarget feature

This will be more useful for marking builtins acceptable for which
subtargets.

Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPU.td
    llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
    llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPU.td?rev=262121&r1=262120&r2=262121&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPU.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPU.td Sat Feb 27 02:53:55 2016
@@ -149,10 +149,16 @@ def FeatureCIInsts : SubtargetFeature<"c
   "Additional intstructions for CI+"
 >;
 
-def FeatureVIInsts : SubtargetFeature<"vi-insts",
-  "VIInsts",
+def FeatureSMemRealTime : SubtargetFeature<"s-memrealtime",
+  "HasSMemRealTime",
   "true",
-  "Additional intstructions for VI+"
+  "Has s_memrealtime instruction"
+>;
+
+def Feature16BitInsts : SubtargetFeature<"16-bit-insts",
+  "Has16BitInsts",
+  "true",
+  "Has i16/f16 instructions"
 >;
 
 //===------------------------------------------------------------===//
@@ -314,7 +320,9 @@ def FeatureSeaIslands : SubtargetFeature
 def FeatureVolcanicIslands : SubtargetFeatureGeneration<"VOLCANIC_ISLANDS",
   [FeatureFP64, FeatureLocalMemorySize65536,
    FeatureWavefrontSize64, FeatureFlatAddressSpace, FeatureGCN,
-   FeatureGCN3Encoding, FeatureCIInsts, FeatureVIInsts]
+   FeatureGCN3Encoding, FeatureCIInsts, Feature16BitInsts,
+   FeatureSMemRealTime
+  ]
 >;
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp?rev=262121&r1=262120&r2=262121&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp Sat Feb 27 02:53:55 2016
@@ -81,7 +81,8 @@ AMDGPUSubtarget::AMDGPUSubtarget(const T
       WavefrontSize(0), CFALUBug(false),
       LocalMemorySize(0), MaxPrivateElementSize(0),
       EnableVGPRSpilling(false), SGPRInitBug(false), IsGCN(false),
-      GCN1Encoding(false), GCN3Encoding(false), CIInsts(false), VIInsts(false),
+      GCN1Encoding(false), GCN3Encoding(false), CIInsts(false),
+      HasSMemRealTime(false), Has16BitInsts(false),
       LDSBankCount(0),
       IsaVersion(ISAVersion0_0_0), EnableHugeScratchBuffer(false),
       EnableSIScheduler(false), FrameLowering(nullptr),

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h?rev=262121&r1=262120&r2=262121&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h Sat Feb 27 02:53:55 2016
@@ -88,7 +88,8 @@ private:
   bool GCN1Encoding;
   bool GCN3Encoding;
   bool CIInsts;
-  bool VIInsts;
+  bool HasSMemRealTime;
+  bool Has16BitInsts;
   bool FeatureDisable;
   int LDSBankCount;
   unsigned IsaVersion;
@@ -169,6 +170,14 @@ public:
     return FlatAddressSpace;
   }
 
+  bool hasSMemRealTime() const {
+    return HasSMemRealTime;
+  }
+
+  bool has16BitInsts() const {
+    return Has16BitInsts;
+  }
+
   bool useFlatForGlobal() const {
     return FlatForGlobal;
   }