[PATCH] D17514: AMDGPU: Split vi-insts subtarget feature
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 22 09:33:27 PST 2016
arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.
This will be more useful for marking builtins acceptable for which
subtargets.
http://reviews.llvm.org/D17514
Files:
lib/Target/AMDGPU/AMDGPU.td
lib/Target/AMDGPU/AMDGPUSubtarget.cpp
lib/Target/AMDGPU/AMDGPUSubtarget.h
Index: lib/Target/AMDGPU/AMDGPUSubtarget.h
===================================================================
--- lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -88,7 +88,8 @@
bool GCN1Encoding;
bool GCN3Encoding;
bool CIInsts;
- bool VIInsts;
+ bool HasSMemRealTime;
+ bool Has16BitInsts;
bool FeatureDisable;
int LDSBankCount;
unsigned IsaVersion;
@@ -169,6 +170,14 @@
return FlatAddressSpace;
}
+ bool hasSMemRealTime() const {
+ return HasSMemRealTime;
+ }
+
+ bool has16BitInsts() const {
+ return Has16BitInsts;
+ }
+
bool useFlatForGlobal() const {
return FlatForGlobal;
}
Index: lib/Target/AMDGPU/AMDGPUSubtarget.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+++ lib/Target/AMDGPU/AMDGPUSubtarget.cpp
@@ -81,7 +81,8 @@
WavefrontSize(0), CFALUBug(false),
LocalMemorySize(0), MaxPrivateElementSize(0),
EnableVGPRSpilling(false), SGPRInitBug(false), IsGCN(false),
- GCN1Encoding(false), GCN3Encoding(false), CIInsts(false), VIInsts(false),
+ GCN1Encoding(false), GCN3Encoding(false), CIInsts(false),
+ HasSMemRealTime(false), Has16BitInsts(false),
LDSBankCount(0),
IsaVersion(ISAVersion0_0_0), EnableHugeScratchBuffer(false),
EnableSIScheduler(false), FrameLowering(nullptr),
Index: lib/Target/AMDGPU/AMDGPU.td
===================================================================
--- lib/Target/AMDGPU/AMDGPU.td
+++ lib/Target/AMDGPU/AMDGPU.td
@@ -149,10 +149,16 @@
"Additional intstructions for CI+"
>;
-def FeatureVIInsts : SubtargetFeature<"vi-insts",
- "VIInsts",
+def FeatureSMemRealTime : SubtargetFeature<"s-memrealtime",
+ "HasSMemRealTime",
"true",
- "Additional intstructions for VI+"
+ "Has s_memrealtime instruction"
+>;
+
+def Feature16BitInsts : SubtargetFeature<"16-bit-insts",
+ "Has16BitInsts",
+ "true",
+ "Has i16/f16 instructions"
>;
//===------------------------------------------------------------===//
@@ -314,7 +320,9 @@
def FeatureVolcanicIslands : SubtargetFeatureGeneration<"VOLCANIC_ISLANDS",
[FeatureFP64, FeatureLocalMemorySize65536,
FeatureWavefrontSize64, FeatureFlatAddressSpace, FeatureGCN,
- FeatureGCN3Encoding, FeatureCIInsts, FeatureVIInsts]
+ FeatureGCN3Encoding, FeatureCIInsts, Feature16BitInsts,
+ FeatureSMemRealTime
+ ]
>;
//===----------------------------------------------------------------------===//
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