[PATCH] D17433: [ARM] fix initialization of PredictableSelectIsExpensive; NFC

[Junmo Park via llvm-commits]

flyingforyou added a comment.

Below is Sanjay's comment in http://reviews.llvm.org/D16836.

> The ARM version is a bigger mess (it won't be NFC), so I'll let someone who knows that backend better make the identical change for that target.


After reading this, I realized that there is no target description file for CortexA15. So, `isLikeA9() `can't be changed to `isOutOfOrder()`.

  bool isLikeA9() const { return isCortexA9() || isCortexA15() || isKrait(); }



  ARMScheduleA9.td (lib\target\arm):  let MicroOpBufferSize = 56; // Based on available renamed registers.
  ARMScheduleSwift.td (lib\target\arm):  let MicroOpBufferSize = 45; // Based on NEON renamed registers.

If we can't use `isOutOfOrder()` which based on `MicroOpBufferSize `, How about changing the function name `isLikeA9 `to `isOutOfOrder`?
But this makes people can be confused which one is proper way to call from `Subtarget->getSchedModel().isOutOfOrder();` or `Subtarget->isOutOfOrder();`.

I think that correct answer is making td file & applying `isOutOfOrder()`. But what I know is we are currently focusing on aarch64. Not 32bit arm.
(We also don't have a plan for making M1's target description about 32bit arm.)

James, Do you have any idea about this? Please, let me know.

Junmo.


http://reviews.llvm.org/D17433