[PATCH] D17294: Fix for PR 26500

[Kit Barton via llvm-commits]

kbarton added inline comments.

================
Comment at: lib/Target/PowerPC/PPCFrameLowering.cpp:615
@@ +614,3 @@
+  // were added as live-in to the prologue block by PrologueEpilogueInserter.
+  for (int i = 0; CSRegs[i]; i++)
+    BV.reset(CSRegs[i]);
----------------
use unsigned and ++i, not i++. 

================
Comment at: lib/Target/PowerPC/PPCFrameLowering.cpp:632
@@ +631,3 @@
+  // whether we were unable to provide enough.
+  if (BV.empty() || (BV.count() < 2 && TwoUniqueRegsRequired))
+    return false;
----------------
You need to move this check above line 618. If there are not two unique registers, you need to return false and set SR1 and SR2 to the default values. This will return false and set the scratch registers to be the same.

================
Comment at: lib/Target/PowerPC/PPCFrameLowering.cpp:643
@@ +642,3 @@
+// and the stack frame is large, we need two scratch registers.
+bool PPCFrameLowering::twoScratchRegsRequired(MachineBasicBlock *MBB) const {
+  const PPCRegisterInfo *RegInfo =
----------------
Please use the term unique here. This isn't about getting two registers - it's about getting unique registers. 

================
Comment at: lib/Target/PowerPC/PPCFrameLowering.cpp:761
@@ -707,1 +760,3 @@
+  bool SingleScratchReg = ScratchReg == TempReg;
+
   int LROffset = getReturnSaveOffset();
----------------
please add:
assert(!(SingleScratchReg && twoScratchRegsRequired) && "I asked for two unique registers!);

This should assure that if you asked for two unique registers, you really got two unique registers.

================
Comment at: lib/Target/PowerPC/PPCFrameLowering.h:53
@@ +52,3 @@
+   * \param[in] TwoUniqueRegsRequired Specify whether this basic block will
+   *                                  require two scratch registers.
+   * \param[out] SR1 The scratch register to use
----------------
... require two unique scratch registers.

================
Comment at: lib/Target/PowerPC/PPCFrameLowering.h:62
@@ -51,1 +61,3 @@
+   *         false if the required number of scratch register were not available
+   *         and R0 is being used as the default.
    */
----------------
... were not available and the defaults are being used.


Repository:
  rL LLVM

http://reviews.llvm.org/D17294