[llvm] r261270 - Remove uses of builtin comma operator.
Richard Trieu via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 18 14:09:31 PST 2016
Author: rtrieu
Date: Thu Feb 18 16:09:30 2016
New Revision: 261270
URL: http://llvm.org/viewvc/llvm-project?rev=261270&view=rev
Log:
Remove uses of builtin comma operator.
Cleanup for upcoming Clang warning -Wcomma. No functionality change intended.
Modified:
llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
llvm/trunk/lib/Analysis/LoopAccessAnalysis.cpp
llvm/trunk/lib/Analysis/ValueTracking.cpp
llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp
llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp
llvm/trunk/lib/CodeGen/LiveInterval.cpp
llvm/trunk/lib/CodeGen/MachineInstr.cpp
llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
llvm/trunk/lib/CodeGen/MachineSink.cpp
llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp
llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/trunk/lib/IR/Function.cpp
llvm/trunk/lib/MC/MCParser/AsmLexer.cpp
llvm/trunk/lib/Support/APFloat.cpp
llvm/trunk/lib/Support/APInt.cpp
llvm/trunk/lib/Support/FileUtilities.cpp
llvm/trunk/lib/Support/IntEqClasses.cpp
llvm/trunk/lib/Support/Unix/Process.inc
llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp
llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp
llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
llvm/trunk/lib/Transforms/Scalar/Sink.cpp
llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp
llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/trunk/tools/llvm-diff/DifferenceEngine.cpp
llvm/trunk/tools/llvm-readobj/ARMWinEHPrinter.cpp
Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Thu Feb 18 16:09:30 2016
@@ -1554,7 +1554,8 @@ bool BasicAAResult::constantOffsetHeuris
unsigned V0ZExtBits = 0, V0SExtBits = 0, V1ZExtBits = 0, V1SExtBits = 0;
const Value *V0 = GetLinearExpression(Var0.V, V0Scale, V0Offset, V0ZExtBits,
V0SExtBits, DL, 0, AC, DT, NSW, NUW);
- NSW = true, NUW = true;
+ NSW = true;
+ NUW = true;
const Value *V1 = GetLinearExpression(Var1.V, V1Scale, V1Offset, V1ZExtBits,
V1SExtBits, DL, 0, AC, DT, NSW, NUW);
Modified: llvm/trunk/lib/Analysis/LoopAccessAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopAccessAnalysis.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/LoopAccessAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/LoopAccessAnalysis.cpp Thu Feb 18 16:09:30 2016
@@ -1325,8 +1325,10 @@ bool MemoryDepChecker::areDepsSafe(DepCa
AccessSets.findValue(AccessSets.getLeaderValue(CurAccess));
// Check accesses within this set.
- EquivalenceClasses<MemAccessInfo>::member_iterator AI, AE;
- AI = AccessSets.member_begin(I), AE = AccessSets.member_end();
+ EquivalenceClasses<MemAccessInfo>::member_iterator AI =
+ AccessSets.member_begin(I);
+ EquivalenceClasses<MemAccessInfo>::member_iterator AE =
+ AccessSets.member_end();
// Check every access pair.
while (AI != AE) {
Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ValueTracking.cpp (original)
+++ llvm/trunk/lib/Analysis/ValueTracking.cpp Thu Feb 18 16:09:30 2016
@@ -1024,7 +1024,8 @@ static void computeKnownBitsFromShiftOpe
// It would be more-clearly correct to use the two temporaries for this
// calculation. Reusing the APInts here to prevent unnecessary allocations.
- KnownZero.clearAllBits(), KnownOne.clearAllBits();
+ KnownZero.clearAllBits();
+ KnownOne.clearAllBits();
// If we know the shifter operand is nonzero, we can sometimes infer more
// known bits. However this is expensive to compute, so be lazy about it and
@@ -1069,8 +1070,10 @@ static void computeKnownBitsFromShiftOpe
// return anything we'd like, but we need to make sure the sets of known bits
// stay disjoint (it should be better for some other code to actually
// propagate the undef than to pick a value here using known bits).
- if ((KnownZero & KnownOne) != 0)
- KnownZero.clearAllBits(), KnownOne.clearAllBits();
+ if ((KnownZero & KnownOne) != 0) {
+ KnownZero.clearAllBits();
+ KnownOne.clearAllBits();
+ }
}
static void computeKnownBitsFromOperator(Operator *I, APInt &KnownZero,
Modified: llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp (original)
+++ llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp Thu Feb 18 16:09:30 2016
@@ -192,11 +192,15 @@ VirtRegAuxInfo::calculateSpillWeightAndH
// FIXME: we probably shouldn't use floats at all.
volatile float hweight = Hint[hint] += weight;
if (TargetRegisterInfo::isPhysicalRegister(hint)) {
- if (hweight > bestPhys && mri.isAllocatable(hint))
- bestPhys = hweight, hintPhys = hint;
+ if (hweight > bestPhys && mri.isAllocatable(hint)) {
+ bestPhys = hweight;
+ hintPhys = hint;
+ }
} else {
- if (hweight > bestVirt)
- bestVirt = hweight, hintVirt = hint;
+ if (hweight > bestVirt) {
+ bestVirt = hweight;
+ hintVirt = hint;
+ }
}
}
Modified: llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp Thu Feb 18 16:09:30 2016
@@ -172,8 +172,10 @@ public:
return L1;
// Splice L2 before L1's members.
UserValue *End = L2;
- while (End->next)
- End->leader = L1, End = End->next;
+ while (End->next) {
+ End->leader = L1;
+ End = End->next;
+ }
End->leader = L1;
End->next = L1->next;
L1->next = L2;
@@ -554,8 +556,10 @@ void UserValue::extendDef(SlotIndex Idx,
Kills->push_back(Start);
return;
}
- if (Segment->end < Stop)
- Stop = Segment->end, ToEnd = false;
+ if (Segment->end < Stop) {
+ Stop = Segment->end;
+ ToEnd = false;
+ }
}
// There could already be a short def at Start.
@@ -569,8 +573,10 @@ void UserValue::extendDef(SlotIndex Idx,
}
// Limited by the next def.
- if (I.valid() && I.start() < Stop)
- Stop = I.start(), ToEnd = false;
+ if (I.valid() && I.start() < Stop) {
+ Stop = I.start();
+ ToEnd = false;
+ }
// Limited by VNI's live range.
else if (!ToEnd && Kills)
Kills->push_back(Stop);
Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Thu Feb 18 16:09:30 2016
@@ -309,10 +309,12 @@ LiveRange::iterator LiveRange::find(Slot
size_t Len = size();
do {
size_t Mid = Len >> 1;
- if (Pos < I[Mid].end)
+ if (Pos < I[Mid].end) {
Len = Mid;
- else
- I += Mid + 1, Len -= Mid + 1;
+ } else {
+ I += Mid + 1;
+ Len -= Mid + 1;
+ }
} while (Len);
return I;
}
Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Thu Feb 18 16:09:30 2016
@@ -1234,8 +1234,10 @@ const TargetRegisterClass *MachineInstr:
unsigned MachineInstr::getBundleSize() const {
MachineBasicBlock::const_instr_iterator I = getIterator();
unsigned Size = 0;
- while (I->isBundledWithSucc())
- ++Size, ++I;
+ while (I->isBundledWithSucc()) {
+ ++Size;
+ ++I;
+ }
return Size;
}
Modified: llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp Thu Feb 18 16:09:30 2016
@@ -396,7 +396,8 @@ void MachineModuleInfo::TidyLandingPads(
LandingPad.BeginLabels.erase(LandingPad.BeginLabels.begin() + j);
LandingPad.EndLabels.erase(LandingPad.EndLabels.begin() + j);
- --j, --e;
+ --j;
+ --e;
}
// Remove landing pads with no try-ranges.
Modified: llvm/trunk/lib/CodeGen/MachineSink.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineSink.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineSink.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineSink.cpp Thu Feb 18 16:09:30 2016
@@ -344,8 +344,10 @@ bool MachineSinking::ProcessBlock(Machin
continue;
}
- if (SinkInstruction(MI, SawStore, AllSuccessors))
- ++NumSunk, MadeChange = true;
+ if (SinkInstruction(MI, SawStore, AllSuccessors)) {
+ ++NumSunk;
+ MadeChange = true;
+ }
// If we just processed the first instruction in the block, we're done.
} while (!ProcessedBegin);
Modified: llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineTraceMetrics.cpp Thu Feb 18 16:09:30 2016
@@ -328,8 +328,10 @@ MinInstrCountEnsemble::pickTracePred(con
continue;
// Pick the predecessor that would give this block the smallest InstrDepth.
unsigned Depth = PredTBI->InstrDepth + CurCount;
- if (!Best || Depth < BestDepth)
- Best = Pred, BestDepth = Depth;
+ if (!Best || Depth < BestDepth) {
+ Best = Pred;
+ BestDepth = Depth;
+ }
}
return Best;
}
@@ -356,8 +358,10 @@ MinInstrCountEnsemble::pickTraceSucc(con
continue;
// Pick the successor that would give this block the smallest InstrHeight.
unsigned Height = SuccTBI->InstrHeight;
- if (!Best || Height < BestHeight)
- Best = Succ, BestHeight = Height;
+ if (!Best || Height < BestHeight) {
+ Best = Succ;
+ BestHeight = Height;
+ }
}
return Best;
}
Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Thu Feb 18 16:09:30 2016
@@ -954,22 +954,28 @@ bool RAGreedy::addSplitConstraints(Inter
// Interference for the live-in value.
if (BI.LiveIn) {
- if (Intf.first() <= Indexes->getMBBStartIdx(BC.Number))
- BC.Entry = SpillPlacement::MustSpill, ++Ins;
- else if (Intf.first() < BI.FirstInstr)
- BC.Entry = SpillPlacement::PrefSpill, ++Ins;
- else if (Intf.first() < BI.LastInstr)
+ if (Intf.first() <= Indexes->getMBBStartIdx(BC.Number)) {
+ BC.Entry = SpillPlacement::MustSpill;
++Ins;
+ } else if (Intf.first() < BI.FirstInstr) {
+ BC.Entry = SpillPlacement::PrefSpill;
+ ++Ins;
+ } else if (Intf.first() < BI.LastInstr) {
+ ++Ins;
+ }
}
// Interference for the live-out value.
if (BI.LiveOut) {
- if (Intf.last() >= SA->getLastSplitPoint(BC.Number))
- BC.Exit = SpillPlacement::MustSpill, ++Ins;
- else if (Intf.last() > BI.LastInstr)
- BC.Exit = SpillPlacement::PrefSpill, ++Ins;
- else if (Intf.last() > BI.FirstInstr)
+ if (Intf.last() >= SA->getLastSplitPoint(BC.Number)) {
+ BC.Exit = SpillPlacement::MustSpill;
++Ins;
+ } else if (Intf.last() > BI.LastInstr) {
+ BC.Exit = SpillPlacement::PrefSpill;
+ ++Ins;
+ } else if (Intf.last() > BI.FirstInstr) {
+ ++Ins;
+ }
}
// Accumulate the total frequency of inserted spill code.
@@ -1392,8 +1398,10 @@ unsigned RAGreedy::calculateRegionSplitC
if (i == BestCand || !GlobalCand[i].PhysReg)
continue;
unsigned Count = GlobalCand[i].LiveBundles.count();
- if (Count < WorstCount)
- Worst = i, WorstCount = Count;
+ if (Count < WorstCount) {
+ Worst = i;
+ WorstCount = Count;
+ }
}
--NumCands;
GlobalCand[Worst] = GlobalCand[NumCands];
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Feb 18 16:09:30 2016
@@ -677,25 +677,33 @@ SDValue RegsForValue::getCopyFromRegs(Se
// now, just use the tightest assertzext/assertsext possible.
bool isSExt = true;
EVT FromVT(MVT::Other);
- if (NumSignBits == RegSize)
- isSExt = true, FromVT = MVT::i1; // ASSERT SEXT 1
- else if (NumZeroBits >= RegSize-1)
- isSExt = false, FromVT = MVT::i1; // ASSERT ZEXT 1
- else if (NumSignBits > RegSize-8)
- isSExt = true, FromVT = MVT::i8; // ASSERT SEXT 8
- else if (NumZeroBits >= RegSize-8)
- isSExt = false, FromVT = MVT::i8; // ASSERT ZEXT 8
- else if (NumSignBits > RegSize-16)
- isSExt = true, FromVT = MVT::i16; // ASSERT SEXT 16
- else if (NumZeroBits >= RegSize-16)
- isSExt = false, FromVT = MVT::i16; // ASSERT ZEXT 16
- else if (NumSignBits > RegSize-32)
- isSExt = true, FromVT = MVT::i32; // ASSERT SEXT 32
- else if (NumZeroBits >= RegSize-32)
- isSExt = false, FromVT = MVT::i32; // ASSERT ZEXT 32
- else
+ if (NumSignBits == RegSize) {
+ isSExt = true; // ASSERT SEXT 1
+ FromVT = MVT::i1;
+ } else if (NumZeroBits >= RegSize - 1) {
+ isSExt = false; // ASSERT ZEXT 1
+ FromVT = MVT::i1;
+ } else if (NumSignBits > RegSize - 8) {
+ isSExt = true; // ASSERT SEXT 8
+ FromVT = MVT::i8;
+ } else if (NumZeroBits >= RegSize - 8) {
+ isSExt = false; // ASSERT ZEXT 8
+ FromVT = MVT::i8;
+ } else if (NumSignBits > RegSize - 16) {
+ isSExt = true; // ASSERT SEXT 16
+ FromVT = MVT::i16;
+ } else if (NumZeroBits >= RegSize - 16) {
+ isSExt = false; // ASSERT ZEXT 16
+ FromVT = MVT::i16;
+ } else if (NumSignBits > RegSize - 32) {
+ isSExt = true; // ASSERT SEXT 32
+ FromVT = MVT::i32;
+ } else if (NumZeroBits >= RegSize - 32) {
+ isSExt = false; // ASSERT ZEXT 32
+ FromVT = MVT::i32;
+ } else {
continue;
-
+ }
// Add an assertion node.
assert(FromVT != MVT::Other);
Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl,
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu Feb 18 16:09:30 2016
@@ -2268,8 +2268,10 @@ void TargetLowering::LowerAsmOperandForC
C = dyn_cast<ConstantSDNode>(Op.getOperand(0));
GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(1));
}
- if (!C || !GA)
- C = nullptr, GA = nullptr;
+ if (!C || !GA) {
+ C = nullptr;
+ GA = nullptr;
+ }
}
// If we find a valid operand, map to the TargetXXX version so that the
Modified: llvm/trunk/lib/IR/Function.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/IR/Function.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/IR/Function.cpp (original)
+++ llvm/trunk/lib/IR/Function.cpp Thu Feb 18 16:09:30 2016
@@ -882,11 +882,17 @@ bool Function::hasAddressTaken(const Use
const User *FU = U.getUser();
if (isa<BlockAddress>(FU))
continue;
- if (!isa<CallInst>(FU) && !isa<InvokeInst>(FU))
- return PutOffender ? (*PutOffender = FU, true) : true;
+ if (!isa<CallInst>(FU) && !isa<InvokeInst>(FU)) {
+ if (PutOffender)
+ *PutOffender = FU;
+ return true;
+ }
ImmutableCallSite CS(cast<Instruction>(FU));
- if (!CS.isCallee(&U))
- return PutOffender ? (*PutOffender = FU, true) : true;
+ if (!CS.isCallee(&U)) {
+ if (PutOffender)
+ *PutOffender = FU;
+ return true;
+ }
}
return false;
}
Modified: llvm/trunk/lib/MC/MCParser/AsmLexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmLexer.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCParser/AsmLexer.cpp (original)
+++ llvm/trunk/lib/MC/MCParser/AsmLexer.cpp Thu Feb 18 16:09:30 2016
@@ -168,9 +168,13 @@ AsmToken AsmLexer::LexIdentifier() {
/// C-Style Comment: /* ... */
AsmToken AsmLexer::LexSlash() {
switch (*CurPtr) {
- case '*': break; // C style comment.
- case '/': return ++CurPtr, LexLineComment();
- default: return AsmToken(AsmToken::Slash, StringRef(CurPtr-1, 1));
+ case '*':
+ break; // C style comment.
+ case '/':
+ ++CurPtr;
+ return LexLineComment();
+ default:
+ return AsmToken(AsmToken::Slash, StringRef(CurPtr - 1, 1));
}
// C Style comment.
@@ -557,21 +561,29 @@ AsmToken AsmLexer::LexToken() {
case '@': return AsmToken(AsmToken::At, StringRef(TokStart, 1));
case '\\': return AsmToken(AsmToken::BackSlash, StringRef(TokStart, 1));
case '=':
- if (*CurPtr == '=')
- return ++CurPtr, AsmToken(AsmToken::EqualEqual, StringRef(TokStart, 2));
+ if (*CurPtr == '=') {
+ ++CurPtr;
+ return AsmToken(AsmToken::EqualEqual, StringRef(TokStart, 2));
+ }
return AsmToken(AsmToken::Equal, StringRef(TokStart, 1));
case '|':
- if (*CurPtr == '|')
- return ++CurPtr, AsmToken(AsmToken::PipePipe, StringRef(TokStart, 2));
+ if (*CurPtr == '|') {
+ ++CurPtr;
+ return AsmToken(AsmToken::PipePipe, StringRef(TokStart, 2));
+ }
return AsmToken(AsmToken::Pipe, StringRef(TokStart, 1));
case '^': return AsmToken(AsmToken::Caret, StringRef(TokStart, 1));
case '&':
- if (*CurPtr == '&')
- return ++CurPtr, AsmToken(AsmToken::AmpAmp, StringRef(TokStart, 2));
+ if (*CurPtr == '&') {
+ ++CurPtr;
+ return AsmToken(AsmToken::AmpAmp, StringRef(TokStart, 2));
+ }
return AsmToken(AsmToken::Amp, StringRef(TokStart, 1));
case '!':
- if (*CurPtr == '=')
- return ++CurPtr, AsmToken(AsmToken::ExclaimEqual, StringRef(TokStart, 2));
+ if (*CurPtr == '=') {
+ ++CurPtr;
+ return AsmToken(AsmToken::ExclaimEqual, StringRef(TokStart, 2));
+ }
return AsmToken(AsmToken::Exclaim, StringRef(TokStart, 1));
case '%': return AsmToken(AsmToken::Percent, StringRef(TokStart, 1));
case '/': return LexSlash();
@@ -583,21 +595,28 @@ AsmToken AsmLexer::LexToken() {
return LexDigit();
case '<':
switch (*CurPtr) {
- case '<': return ++CurPtr, AsmToken(AsmToken::LessLess,
- StringRef(TokStart, 2));
- case '=': return ++CurPtr, AsmToken(AsmToken::LessEqual,
- StringRef(TokStart, 2));
- case '>': return ++CurPtr, AsmToken(AsmToken::LessGreater,
- StringRef(TokStart, 2));
- default: return AsmToken(AsmToken::Less, StringRef(TokStart, 1));
+ case '<':
+ ++CurPtr;
+ return AsmToken(AsmToken::LessLess, StringRef(TokStart, 2));
+ case '=':
+ ++CurPtr;
+ return AsmToken(AsmToken::LessEqual, StringRef(TokStart, 2));
+ case '>':
+ ++CurPtr;
+ return AsmToken(AsmToken::LessGreater, StringRef(TokStart, 2));
+ default:
+ return AsmToken(AsmToken::Less, StringRef(TokStart, 1));
}
case '>':
switch (*CurPtr) {
- case '>': return ++CurPtr, AsmToken(AsmToken::GreaterGreater,
- StringRef(TokStart, 2));
- case '=': return ++CurPtr, AsmToken(AsmToken::GreaterEqual,
- StringRef(TokStart, 2));
- default: return AsmToken(AsmToken::Greater, StringRef(TokStart, 1));
+ case '>':
+ ++CurPtr;
+ return AsmToken(AsmToken::GreaterGreater, StringRef(TokStart, 2));
+ case '=':
+ ++CurPtr;
+ return AsmToken(AsmToken::GreaterEqual, StringRef(TokStart, 2));
+ default:
+ return AsmToken(AsmToken::Greater, StringRef(TokStart, 1));
}
// TODO: Quoted identifiers (objc methods etc)
Modified: llvm/trunk/lib/Support/APFloat.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APFloat.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Support/APFloat.cpp (original)
+++ llvm/trunk/lib/Support/APFloat.cpp Thu Feb 18 16:09:30 2016
@@ -501,7 +501,9 @@ powerOf5(integerPart *dst, unsigned int
/* Now result is in p1 with partsCount parts and p2 is scratch
space. */
- tmp = p1, p1 = p2, p2 = tmp;
+ tmp = p1;
+ p1 = p2;
+ p2 = tmp;
}
pow5 += pc;
Modified: llvm/trunk/lib/Support/APInt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Support/APInt.cpp (original)
+++ llvm/trunk/lib/Support/APInt.cpp Thu Feb 18 16:09:30 2016
@@ -2698,8 +2698,10 @@ APInt::tcDivide(integerPart *lhs, const
break;
shiftCount--;
tcShiftRight(srhs, parts, 1);
- if ((mask >>= 1) == 0)
- mask = (integerPart) 1 << (integerPartWidth - 1), n--;
+ if ((mask >>= 1) == 0) {
+ mask = (integerPart) 1 << (integerPartWidth - 1);
+ n--;
+ }
}
return false;
Modified: llvm/trunk/lib/Support/FileUtilities.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/FileUtilities.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Support/FileUtilities.cpp (original)
+++ llvm/trunk/lib/Support/FileUtilities.cpp Thu Feb 18 16:09:30 2016
@@ -217,8 +217,10 @@ int llvm::DiffFilesWithTolerance(StringR
bool CompareFailed = false;
while (1) {
// Scan for the end of file or next difference.
- while (F1P < File1End && F2P < File2End && *F1P == *F2P)
- ++F1P, ++F2P;
+ while (F1P < File1End && F2P < File2End && *F1P == *F2P) {
+ ++F1P;
+ ++F2P;
+ }
if (F1P >= File1End || F2P >= File2End) break;
Modified: llvm/trunk/lib/Support/IntEqClasses.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/IntEqClasses.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Support/IntEqClasses.cpp (original)
+++ llvm/trunk/lib/Support/IntEqClasses.cpp Thu Feb 18 16:09:30 2016
@@ -37,10 +37,15 @@ unsigned IntEqClasses::join(unsigned a,
// incrementally. The larger leader will eventually be updated, joining the
// classes.
while (eca != ecb)
- if (eca < ecb)
- EC[b] = eca, b = ecb, ecb = EC[b];
- else
- EC[a] = ecb, a = eca, eca = EC[a];
+ if (eca < ecb) {
+ EC[b] = eca;
+ b = ecb;
+ ecb = EC[b];
+ } else {
+ EC[a] = ecb;
+ a = eca;
+ eca = EC[a];
+ }
return eca;
}
Modified: llvm/trunk/lib/Support/Unix/Process.inc
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Unix/Process.inc?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Unix/Process.inc (original)
+++ llvm/trunk/lib/Support/Unix/Process.inc Thu Feb 18 16:09:30 2016
@@ -456,7 +456,7 @@ unsigned llvm::sys::Process::GetRandomNu
#if defined(HAVE_DECL_ARC4RANDOM) && HAVE_DECL_ARC4RANDOM
return arc4random();
#else
- static int x = (::srand(GetRandomNumberSeed()), 0);
+ static int x = (static_cast<void>(::srand(GetRandomNumberSeed())), 0);
(void)x;
return ::rand();
#endif
Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp Thu Feb 18 16:09:30 2016
@@ -1880,39 +1880,45 @@ void AArch64InstrInfo::storeRegToStackSl
else if (AArch64::DDRegClass.hasSubClassEq(RC)) {
assert(Subtarget.hasNEON() &&
"Unexpected register store without NEON");
- Opc = AArch64::ST1Twov1d, Offset = false;
+ Opc = AArch64::ST1Twov1d;
+ Offset = false;
}
break;
case 24:
if (AArch64::DDDRegClass.hasSubClassEq(RC)) {
assert(Subtarget.hasNEON() &&
"Unexpected register store without NEON");
- Opc = AArch64::ST1Threev1d, Offset = false;
+ Opc = AArch64::ST1Threev1d;
+ Offset = false;
}
break;
case 32:
if (AArch64::DDDDRegClass.hasSubClassEq(RC)) {
assert(Subtarget.hasNEON() &&
"Unexpected register store without NEON");
- Opc = AArch64::ST1Fourv1d, Offset = false;
+ Opc = AArch64::ST1Fourv1d;
+ Offset = false;
} else if (AArch64::QQRegClass.hasSubClassEq(RC)) {
assert(Subtarget.hasNEON() &&
"Unexpected register store without NEON");
- Opc = AArch64::ST1Twov2d, Offset = false;
+ Opc = AArch64::ST1Twov2d;
+ Offset = false;
}
break;
case 48:
if (AArch64::QQQRegClass.hasSubClassEq(RC)) {
assert(Subtarget.hasNEON() &&
"Unexpected register store without NEON");
- Opc = AArch64::ST1Threev2d, Offset = false;
+ Opc = AArch64::ST1Threev2d;
+ Offset = false;
}
break;
case 64:
if (AArch64::QQQQRegClass.hasSubClassEq(RC)) {
assert(Subtarget.hasNEON() &&
"Unexpected register store without NEON");
- Opc = AArch64::ST1Fourv2d, Offset = false;
+ Opc = AArch64::ST1Fourv2d;
+ Offset = false;
}
break;
}
@@ -1978,39 +1984,45 @@ void AArch64InstrInfo::loadRegFromStackS
else if (AArch64::DDRegClass.hasSubClassEq(RC)) {
assert(Subtarget.hasNEON() &&
"Unexpected register load without NEON");
- Opc = AArch64::LD1Twov1d, Offset = false;
+ Opc = AArch64::LD1Twov1d;
+ Offset = false;
}
break;
case 24:
if (AArch64::DDDRegClass.hasSubClassEq(RC)) {
assert(Subtarget.hasNEON() &&
"Unexpected register load without NEON");
- Opc = AArch64::LD1Threev1d, Offset = false;
+ Opc = AArch64::LD1Threev1d;
+ Offset = false;
}
break;
case 32:
if (AArch64::DDDDRegClass.hasSubClassEq(RC)) {
assert(Subtarget.hasNEON() &&
"Unexpected register load without NEON");
- Opc = AArch64::LD1Fourv1d, Offset = false;
+ Opc = AArch64::LD1Fourv1d;
+ Offset = false;
} else if (AArch64::QQRegClass.hasSubClassEq(RC)) {
assert(Subtarget.hasNEON() &&
"Unexpected register load without NEON");
- Opc = AArch64::LD1Twov2d, Offset = false;
+ Opc = AArch64::LD1Twov2d;
+ Offset = false;
}
break;
case 48:
if (AArch64::QQQRegClass.hasSubClassEq(RC)) {
assert(Subtarget.hasNEON() &&
"Unexpected register load without NEON");
- Opc = AArch64::LD1Threev2d, Offset = false;
+ Opc = AArch64::LD1Threev2d;
+ Offset = false;
}
break;
case 64:
if (AArch64::QQQQRegClass.hasSubClassEq(RC)) {
assert(Subtarget.hasNEON() &&
"Unexpected register load without NEON");
- Opc = AArch64::LD1Fourv2d, Offset = false;
+ Opc = AArch64::LD1Fourv2d;
+ Offset = false;
}
break;
}
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Thu Feb 18 16:09:30 2016
@@ -3565,11 +3565,12 @@ void PPCDAGToDAGISel::PeepholeCROps() {
MVT::i1, MachineNode->getOperand(0),
MachineNode->getOperand(1).
getOperand(0));
- else if (AllUsersSelectZero(MachineNode))
+ else if (AllUsersSelectZero(MachineNode)) {
ResNode = CurDAG->getMachineNode(PPC::CRNAND, SDLoc(MachineNode),
MVT::i1, MachineNode->getOperand(0),
- MachineNode->getOperand(1)),
+ MachineNode->getOperand(1));
SelectSwap = true;
+ }
break;
case PPC::CRNAND:
if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
@@ -3603,11 +3604,12 @@ void PPCDAGToDAGISel::PeepholeCROps() {
MVT::i1, MachineNode->getOperand(1).
getOperand(0),
MachineNode->getOperand(0));
- else if (AllUsersSelectZero(MachineNode))
+ else if (AllUsersSelectZero(MachineNode)) {
ResNode = CurDAG->getMachineNode(PPC::CRAND, SDLoc(MachineNode),
MVT::i1, MachineNode->getOperand(0),
- MachineNode->getOperand(1)),
+ MachineNode->getOperand(1));
SelectSwap = true;
+ }
break;
case PPC::CROR:
if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
@@ -3635,11 +3637,12 @@ void PPCDAGToDAGISel::PeepholeCROps() {
MVT::i1, MachineNode->getOperand(0),
MachineNode->getOperand(1).
getOperand(0));
- else if (AllUsersSelectZero(MachineNode))
+ else if (AllUsersSelectZero(MachineNode)) {
ResNode = CurDAG->getMachineNode(PPC::CRNOR, SDLoc(MachineNode),
MVT::i1, MachineNode->getOperand(0),
- MachineNode->getOperand(1)),
+ MachineNode->getOperand(1));
SelectSwap = true;
+ }
break;
case PPC::CRXOR:
if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
@@ -3674,11 +3677,12 @@ void PPCDAGToDAGISel::PeepholeCROps() {
MVT::i1, MachineNode->getOperand(0),
MachineNode->getOperand(1).
getOperand(0));
- else if (AllUsersSelectZero(MachineNode))
+ else if (AllUsersSelectZero(MachineNode)) {
ResNode = CurDAG->getMachineNode(PPC::CREQV, SDLoc(MachineNode),
MVT::i1, MachineNode->getOperand(0),
- MachineNode->getOperand(1)),
+ MachineNode->getOperand(1));
SelectSwap = true;
+ }
break;
case PPC::CRNOR:
if (Op1Set || Op2Set)
@@ -3707,11 +3711,12 @@ void PPCDAGToDAGISel::PeepholeCROps() {
MVT::i1, MachineNode->getOperand(1).
getOperand(0),
MachineNode->getOperand(0));
- else if (AllUsersSelectZero(MachineNode))
+ else if (AllUsersSelectZero(MachineNode)) {
ResNode = CurDAG->getMachineNode(PPC::CROR, SDLoc(MachineNode),
MVT::i1, MachineNode->getOperand(0),
- MachineNode->getOperand(1)),
+ MachineNode->getOperand(1));
SelectSwap = true;
+ }
break;
case PPC::CREQV:
if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
@@ -3746,11 +3751,12 @@ void PPCDAGToDAGISel::PeepholeCROps() {
MVT::i1, MachineNode->getOperand(0),
MachineNode->getOperand(1).
getOperand(0));
- else if (AllUsersSelectZero(MachineNode))
+ else if (AllUsersSelectZero(MachineNode)) {
ResNode = CurDAG->getMachineNode(PPC::CRXOR, SDLoc(MachineNode),
MVT::i1, MachineNode->getOperand(0),
- MachineNode->getOperand(1)),
+ MachineNode->getOperand(1));
SelectSwap = true;
+ }
break;
case PPC::CRANDC:
if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
@@ -3781,11 +3787,12 @@ void PPCDAGToDAGISel::PeepholeCROps() {
MVT::i1, MachineNode->getOperand(0),
MachineNode->getOperand(1).
getOperand(0));
- else if (AllUsersSelectZero(MachineNode))
+ else if (AllUsersSelectZero(MachineNode)) {
ResNode = CurDAG->getMachineNode(PPC::CRORC, SDLoc(MachineNode),
MVT::i1, MachineNode->getOperand(1),
- MachineNode->getOperand(0)),
+ MachineNode->getOperand(0));
SelectSwap = true;
+ }
break;
case PPC::CRORC:
if (MachineNode->getOperand(0) == MachineNode->getOperand(1))
@@ -3816,11 +3823,12 @@ void PPCDAGToDAGISel::PeepholeCROps() {
MVT::i1, MachineNode->getOperand(0),
MachineNode->getOperand(1).
getOperand(0));
- else if (AllUsersSelectZero(MachineNode))
+ else if (AllUsersSelectZero(MachineNode)) {
ResNode = CurDAG->getMachineNode(PPC::CRANDC, SDLoc(MachineNode),
MVT::i1, MachineNode->getOperand(1),
- MachineNode->getOperand(0)),
+ MachineNode->getOperand(0));
SelectSwap = true;
+ }
break;
case PPC::SELECT_I4:
case PPC::SELECT_I8:
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Thu Feb 18 16:09:30 2016
@@ -883,8 +883,8 @@ void PPCInstrInfo::copyPhysReg(MachineBa
if (PPC::CRBITRCRegClass.contains(SrcReg) &&
PPC::GPRCRegClass.contains(DestReg)) {
unsigned CRReg = getCRFromCRBit(SrcReg);
- BuildMI(MBB, I, DL, get(PPC::MFOCRF), DestReg)
- .addReg(CRReg), getKillRegState(KillSrc);
+ BuildMI(MBB, I, DL, get(PPC::MFOCRF), DestReg).addReg(CRReg);
+ getKillRegState(KillSrc);
// Rotate the CR bit in the CR fields to be the least significant bit and
// then mask with 0x1 (MB = ME = 31).
BuildMI(MBB, I, DL, get(PPC::RLWINM), DestReg)
@@ -895,13 +895,13 @@ void PPCInstrInfo::copyPhysReg(MachineBa
return;
} else if (PPC::CRRCRegClass.contains(SrcReg) &&
PPC::G8RCRegClass.contains(DestReg)) {
- BuildMI(MBB, I, DL, get(PPC::MFOCRF8), DestReg)
- .addReg(SrcReg), getKillRegState(KillSrc);
+ BuildMI(MBB, I, DL, get(PPC::MFOCRF8), DestReg).addReg(SrcReg);
+ getKillRegState(KillSrc);
return;
} else if (PPC::CRRCRegClass.contains(SrcReg) &&
PPC::GPRCRegClass.contains(DestReg)) {
- BuildMI(MBB, I, DL, get(PPC::MFOCRF), DestReg)
- .addReg(SrcReg), getKillRegState(KillSrc);
+ BuildMI(MBB, I, DL, get(PPC::MFOCRF), DestReg).addReg(SrcReg);
+ getKillRegState(KillSrc);
return;
}
Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Thu Feb 18 16:09:30 2016
@@ -1542,7 +1542,8 @@ void FPS::handleSpecialFP(MachineBasicBl
// Remove the operand so that later passes don't see it.
MI->RemoveOperand(i);
- --i, --e;
+ --i;
+ --e;
}
// We may have been carrying spurious live-ins, so make sure only the returned
Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Thu Feb 18 16:09:30 2016
@@ -1186,7 +1186,8 @@ int FunctionComparator::cmpBasicBlocks(c
}
}
- ++InstL, ++InstR;
+ ++InstL;
+ ++InstR;
} while (InstL != InstLE && InstR != InstRE);
if (InstL != InstLE && InstR == InstRE)
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Thu Feb 18 16:09:30 2016
@@ -123,11 +123,18 @@ namespace {
bool isConstant() const { return Val == nullptr; }
bool isZero() const { return Coeff.isZero(); }
- void set(short Coefficient, Value *V) { Coeff.set(Coefficient), Val = V; }
- void set(const APFloat& Coefficient, Value *V)
- { Coeff.set(Coefficient); Val = V; }
- void set(const ConstantFP* Coefficient, Value *V)
- { Coeff.set(Coefficient->getValueAPF()); Val = V; }
+ void set(short Coefficient, Value *V) {
+ Coeff.set(Coefficient);
+ Val = V;
+ }
+ void set(const APFloat &Coefficient, Value *V) {
+ Coeff.set(Coefficient);
+ Val = V;
+ }
+ void set(const ConstantFP *Coefficient, Value *V) {
+ Coeff.set(Coefficient->getValueAPF());
+ Val = V;
+ }
void negate() { Coeff.negate(); }
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp Thu Feb 18 16:09:30 2016
@@ -2473,7 +2473,8 @@ InstCombiner::transformCallThroughTrampo
Idx + (Idx >= NestIdx), B));
}
- ++Idx, ++I;
+ ++Idx;
+ ++I;
} while (1);
}
@@ -2507,7 +2508,8 @@ InstCombiner::transformCallThroughTrampo
// Add the original type.
NewTypes.push_back(*I);
- ++Idx, ++I;
+ ++Idx;
+ ++I;
} while (1);
}
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Thu Feb 18 16:09:30 2016
@@ -3674,10 +3674,14 @@ Instruction *InstCombiner::visitICmpInst
// Analyze the case when either Op0 or Op1 is an add instruction.
// Op0 = A + B (or A and B are null); Op1 = C + D (or C and D are null).
Value *A = nullptr, *B = nullptr, *C = nullptr, *D = nullptr;
- if (BO0 && BO0->getOpcode() == Instruction::Add)
- A = BO0->getOperand(0), B = BO0->getOperand(1);
- if (BO1 && BO1->getOpcode() == Instruction::Add)
- C = BO1->getOperand(0), D = BO1->getOperand(1);
+ if (BO0 && BO0->getOpcode() == Instruction::Add) {
+ A = BO0->getOperand(0);
+ B = BO0->getOperand(1);
+ }
+ if (BO1 && BO1->getOpcode() == Instruction::Add) {
+ C = BO1->getOperand(0);
+ D = BO1->getOperand(1);
+ }
// icmp (X+cst) < 0 --> X < -cst
if (NoOp0WrapProblem && ICmpInst::isSigned(Pred) && match(Op1, m_Zero()))
@@ -3794,11 +3798,18 @@ Instruction *InstCombiner::visitICmpInst
// Analyze the case when either Op0 or Op1 is a sub instruction.
// Op0 = A - B (or A and B are null); Op1 = C - D (or C and D are null).
- A = nullptr; B = nullptr; C = nullptr; D = nullptr;
- if (BO0 && BO0->getOpcode() == Instruction::Sub)
- A = BO0->getOperand(0), B = BO0->getOperand(1);
- if (BO1 && BO1->getOpcode() == Instruction::Sub)
- C = BO1->getOperand(0), D = BO1->getOperand(1);
+ A = nullptr;
+ B = nullptr;
+ C = nullptr;
+ D = nullptr;
+ if (BO0 && BO0->getOpcode() == Instruction::Sub) {
+ A = BO0->getOperand(0);
+ B = BO0->getOperand(1);
+ }
+ if (BO1 && BO1->getOpcode() == Instruction::Sub) {
+ C = BO1->getOperand(0);
+ D = BO1->getOperand(1);
+ }
// icmp (X-Y), X -> icmp 0, Y for equalities or if there is no overflow.
if (A == Op1 && NoOp0WrapProblem)
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp Thu Feb 18 16:09:30 2016
@@ -374,10 +374,13 @@ Instruction *InstCombiner::visitMul(Bina
APInt Negative2(I.getType()->getPrimitiveSizeInBits(), (uint64_t)-2, true);
Value *BoolCast = nullptr, *OtherOp = nullptr;
- if (MaskedValueIsZero(Op0, Negative2, 0, &I))
- BoolCast = Op0, OtherOp = Op1;
- else if (MaskedValueIsZero(Op1, Negative2, 0, &I))
- BoolCast = Op1, OtherOp = Op0;
+ if (MaskedValueIsZero(Op0, Negative2, 0, &I)) {
+ BoolCast = Op0;
+ OtherOp = Op1;
+ } else if (MaskedValueIsZero(Op1, Negative2, 0, &I)) {
+ BoolCast = Op1;
+ OtherOp = Op0;
+ }
if (BoolCast) {
Value *V = Builder->CreateSub(Constant::getNullValue(I.getType()),
Modified: llvm/trunk/lib/Transforms/Scalar/Sink.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/Sink.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/Sink.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/Sink.cpp Thu Feb 18 16:09:30 2016
@@ -145,8 +145,10 @@ bool Sinking::ProcessBlock(BasicBlock &B
if (isa<DbgInfoIntrinsic>(Inst))
continue;
- if (SinkInstruction(Inst, Stores))
- ++NumSunk, MadeChange = true;
+ if (SinkInstruction(Inst, Stores)) {
+ ++NumSunk;
+ MadeChange = true;
+ }
// If we just processed the first instruction in the block, we're done.
} while (!ProcessedBegin);
Modified: llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp Thu Feb 18 16:09:30 2016
@@ -529,7 +529,8 @@ void llvm::CloneAndPruneIntoFromInst(Fun
PN->setIncomingBlock(pred, MappedBlock);
} else {
PN->removeIncomingValue(pred, false);
- --pred, --e; // Revisit the next entry.
+ --pred; // Revisit the next entry.
+ --e;
}
}
}
Modified: llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Thu Feb 18 16:09:30 2016
@@ -802,7 +802,8 @@ void PromoteMem2Reg::ComputeLiveInBlocks
// actually live-in here.
LiveInBlockWorklist[i] = LiveInBlockWorklist.back();
LiveInBlockWorklist.pop_back();
- --i, --e;
+ --i;
+ --e;
break;
}
Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Thu Feb 18 16:09:30 2016
@@ -2190,16 +2190,19 @@ bool llvm::FoldBranchToCommonDest(Branch
bool InvertPredCond = false;
if (BI->isConditional()) {
- if (PBI->getSuccessor(0) == TrueDest)
+ if (PBI->getSuccessor(0) == TrueDest) {
Opc = Instruction::Or;
- else if (PBI->getSuccessor(1) == FalseDest)
+ } else if (PBI->getSuccessor(1) == FalseDest) {
Opc = Instruction::And;
- else if (PBI->getSuccessor(0) == FalseDest)
- Opc = Instruction::And, InvertPredCond = true;
- else if (PBI->getSuccessor(1) == TrueDest)
- Opc = Instruction::Or, InvertPredCond = true;
- else
+ } else if (PBI->getSuccessor(0) == FalseDest) {
+ Opc = Instruction::And;
+ InvertPredCond = true;
+ } else if (PBI->getSuccessor(1) == TrueDest) {
+ Opc = Instruction::Or;
+ InvertPredCond = true;
+ } else {
continue;
+ }
} else {
if (PBI->getSuccessor(0) != TrueDest && PBI->getSuccessor(1) != TrueDest)
continue;
@@ -2750,16 +2753,21 @@ static bool SimplifyCondBranchToCondBran
return false;
int PBIOp, BIOp;
- if (PBI->getSuccessor(0) == BI->getSuccessor(0))
- PBIOp = BIOp = 0;
- else if (PBI->getSuccessor(0) == BI->getSuccessor(1))
- PBIOp = 0, BIOp = 1;
- else if (PBI->getSuccessor(1) == BI->getSuccessor(0))
- PBIOp = 1, BIOp = 0;
- else if (PBI->getSuccessor(1) == BI->getSuccessor(1))
- PBIOp = BIOp = 1;
- else
+ if (PBI->getSuccessor(0) == BI->getSuccessor(0)) {
+ PBIOp = 0;
+ BIOp = 0;
+ } else if (PBI->getSuccessor(0) == BI->getSuccessor(1)) {
+ PBIOp = 0;
+ BIOp = 1;
+ } else if (PBI->getSuccessor(1) == BI->getSuccessor(0)) {
+ PBIOp = 1;
+ BIOp = 0;
+ } else if (PBI->getSuccessor(1) == BI->getSuccessor(1)) {
+ PBIOp = 1;
+ BIOp = 1;
+ } else {
return false;
+ }
// Check to make sure that the other destination of this branch
// isn't BB itself. If so, this is an infinite loop that will
Modified: llvm/trunk/tools/llvm-diff/DifferenceEngine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-diff/DifferenceEngine.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-diff/DifferenceEngine.cpp (original)
+++ llvm/trunk/tools/llvm-diff/DifferenceEngine.cpp Thu Feb 18 16:09:30 2016
@@ -210,7 +210,8 @@ class FunctionDifferenceEngine {
if (!LeftI->use_empty())
TentativeValues.insert(std::make_pair(LeftI, RightI));
- ++LI, ++RI;
+ ++LI;
+ ++RI;
} while (LI != LE); // This is sufficient: we can't get equality of
// terminators if there are residual instructions.
@@ -555,7 +556,9 @@ void FunctionDifferenceEngine::runBlockD
PI = Path.begin(), PE = Path.end();
while (PI != PE && *PI == DC_match) {
unify(&*LI, &*RI);
- ++PI, ++LI, ++RI;
+ ++PI;
+ ++LI;
+ ++RI;
}
for (; PI != PE; ++PI) {
@@ -589,7 +592,8 @@ void FunctionDifferenceEngine::runBlockD
while (LI != LE) {
assert(RI != RE);
unify(&*LI, &*RI);
- ++LI, ++RI;
+ ++LI;
+ ++RI;
}
// If the terminators have different kinds, but one is an invoke and the
Modified: llvm/trunk/tools/llvm-readobj/ARMWinEHPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-readobj/ARMWinEHPrinter.cpp?rev=261270&r1=261269&r2=261270&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-readobj/ARMWinEHPrinter.cpp (original)
+++ llvm/trunk/tools/llvm-readobj/ARMWinEHPrinter.cpp Thu Feb 18 16:09:30 2016
@@ -247,7 +247,7 @@ bool Decoder::opcode_10Lxxxxx(const uint
printRegisters(std::make_pair(RegisterMask, 0));
OS << '\n';
- ++Offset, ++Offset;
+ Offset += 2;
return false;
}
@@ -320,7 +320,7 @@ bool Decoder::opcode_111010xx(const uint
static_cast<const char *>(Prologue ? "sub" : "add"),
Imm);
- ++Offset, ++Offset;
+ Offset += 2;
return false;
}
@@ -334,7 +334,7 @@ bool Decoder::opcode_1110110L(const uint
printRegisters(std::make_pair(GPRMask, 0));
OS << '\n';
- ++Offset, ++Offset;
+ Offset += 2;
return false;
}
@@ -350,7 +350,7 @@ bool Decoder::opcode_11101110(const uint
<< format("0x%02x 0x%02x ; microsoft-specific (type: %u)\n",
OC[Offset + 0], OC[Offset + 1], OC[Offset + 1] & 0x0f);
- ++Offset, ++Offset;
+ Offset += 2;
return false;
}
@@ -366,7 +366,7 @@ bool Decoder::opcode_11101111(const uint
<< format("0x%02x 0x%02x ; ldr.w lr, [sp], #%u\n",
OC[Offset + 0], OC[Offset + 1], OC[Offset + 1] << 2);
- ++Offset, ++Offset;
+ Offset += 2;
return false;
}
@@ -381,7 +381,7 @@ bool Decoder::opcode_11110101(const uint
printRegisters(std::make_pair(0, VFPMask));
OS << '\n';
- ++Offset, ++Offset;
+ Offset += 2;
return false;
}
@@ -396,7 +396,7 @@ bool Decoder::opcode_11110110(const uint
printRegisters(std::make_pair(0, VFPMask));
OS << '\n';
- ++Offset, ++Offset;
+ Offset += 2;
return false;
}
@@ -409,7 +409,7 @@ bool Decoder::opcode_11110111(const uint
static_cast<const char *>(Prologue ? "sub" : "add"),
Imm);
- ++Offset, ++Offset, ++Offset;
+ Offset += 3;
return false;
}
@@ -424,7 +424,7 @@ bool Decoder::opcode_11111000(const uint
OC[Offset + 0], OC[Offset + 1], OC[Offset + 2], OC[Offset + 3],
static_cast<const char *>(Prologue ? "sub" : "add"), Imm);
- ++Offset, ++Offset, ++Offset, ++Offset;
+ Offset += 4;
return false;
}
@@ -437,7 +437,7 @@ bool Decoder::opcode_11111001(const uint
OC[Offset + 0], OC[Offset + 1], OC[Offset + 2],
static_cast<const char *>(Prologue ? "sub" : "add"), Imm);
- ++Offset, ++Offset, ++Offset;
+ Offset += 3;
return false;
}
@@ -452,7 +452,7 @@ bool Decoder::opcode_11111010(const uint
OC[Offset + 0], OC[Offset + 1], OC[Offset + 2], OC[Offset + 3],
static_cast<const char *>(Prologue ? "sub" : "add"), Imm);
- ++Offset, ++Offset, ++Offset, ++Offset;
+ Offset += 4;
return false;
}
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