[PATCH] D17270: Support arbitrary addrspace pointers in masked load/store intrinsics

[Artur Pilipenko via llvm-commits]

apilipenko added a comment.

To do what you propose we have to have something like that:

  def int_masked_store : Intrinsic<[], [LLVMPointerElementType<1>, llvm_anyptr_ty,
                                        llvm_i32_ty,
                                        LLVMVectorSameWidth<0, llvm_i1_ty>],
                                   [IntrReadWriteArgMem]>;
  
  def int_masked_load  : Intrinsic<[LLVMPointerElementType<1>],
                                   [llvm_anyptr_ty, llvm_i32_ty,
                                    LLVMVectorSameWidth<0, llvm_i1_ty>, LLVMMatchType<0>],
                                   [IntrReadArgMem]>;

In both cases we need to match the type of a parameter which is listed after the current parameter. It's not possible in the current scheme.

From Intrinsics.td, class LLVMMatchType comment:

  // Match the type of another intrinsic parameter.  Number is an index into the
  // list of overloaded types for the intrinsic, excluding all the fixed types.
  // The Number value must refer to a previously listed type.

This limitation simplifies parsing of intrinsic definitions, since we always know that the type we are referencing to is already decalred. Support of arbitrary referencing will complicate parsing code in CodeGenTarget a lot. Probably it will require changes to IntrinsicEmitter as well. Not to mention that we don't have a LLVMPointerElementType class in tablgen intrinsics description now.

I don't think that it worth the effort, because eventually when we have typeless pointers we will need both overloaded types again.


http://reviews.llvm.org/D17270