[PATCH] D17373: Prevent usage of OR16_MMR6 instruction when code for microMIPS is generated.

[Milena Vujosevic Janicic via llvm-commits]

milena.vujosevic.janicic created this revision.
milena.vujosevic.janicic added reviewers: dsanders, zoran.jovanovic, vkalintiris.
milena.vujosevic.janicic added a subscriber: llvm-commits.
Herald added a subscriber: dsanders.

http://reviews.llvm.org/D17373

Files:
  lib/Target/Mips/MicroMips32r6InstrInfo.td
  test/CodeGen/Mips/micromips-32r2-or16.ll

Index: test/CodeGen/Mips/micromips-32r2-or16.ll
===================================================================
--- /dev/null
+++ test/CodeGen/Mips/micromips-32r2-or16.ll
@@ -0,0 +1,42 @@
+; RUN: llc -O0 -march=mips -mcpu=mips32r2 -mattr=+micromips -asm-show-inst < %s | FileCheck %s
+
+target datalayout = "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
+target triple = "mipsel--linux-gnu"
+
+%class.ContextMap1 = type { i8 }
+ at pos = global i32 0, align 4
+declare i32 @_Z3minii(i32 signext %a, i32 signext %b)
+declare void @_ZN11ContextMap1C2Ev(%class.ContextMap1* %this)
+declare void @_ZN11ContextMap13setEi(%class.ContextMap1* %this, i32 signext %i)
+
+define i32 @main(i32 signext %argc, i8** %argv) {
+entry:
+  %retval = alloca i32, align 4
+  %argc.addr = alloca i32, align 4
+  %argv.addr = alloca i8**, align 4
+  %cr = alloca %class.ContextMap1, align 1
+  %bpos = alloca i32, align 4
+  %c = alloca i32, align 4
+  store i32 0, i32* %retval, align 4
+  store i32 %argc, i32* %argc.addr, align 4
+  store i8** %argv, i8*** %argv.addr, align 4
+  call void @_ZN11ContextMap1C2Ev(%class.ContextMap1* %cr)
+  %0 = load i32, i32* %bpos, align 4
+  %cmp = icmp eq i32 %0, 0
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:                                          ; preds = %entry
+; CHECK-NOT: OR16_MMR6
+  store i32 255, i32* %c, align 4
+  %1 = load i32, i32* @pos, align 4
+  %call = call i32 @_Z3minii(i32 signext %1, i32 signext 255)
+  %2 = load i32, i32* %c, align 4
+  %shl = shl i32 %2, 8
+  %add = add nsw i32 %shl, 234567
+  %or = or i32 %call, %add
+  call void @_ZN11ContextMap13setEi(%class.ContextMap1* %cr, i32 signext %or)
+  br label %if.end
+
+if.end:                                           ; preds = %if.then, %entry
+  ret i32 0
+}
Index: lib/Target/Mips/MicroMips32r6InstrInfo.td
===================================================================
--- lib/Target/Mips/MicroMips32r6InstrInfo.td
+++ lib/Target/Mips/MicroMips32r6InstrInfo.td
@@ -812,7 +812,7 @@
       MMR6Arch<"andi16">;
 class NOT16_MMR6_DESC : NotMM16<"not16", GPRMM16Opnd>, MMR6Arch<"not16">;
 class OR16_MMR6_DESC : LogicRMM16<"or16", GPRMM16Opnd, II_OR, or>,
-      MMR6Arch<"or16">;
+      MMR6Arch<"or16">, MicroMipsR6Inst16;
 class SLL16_MMR6_DESC : ShiftIMM16<"sll16", uimm3_shift, GPRMM16Opnd, II_SLL>,
       MMR6Arch<"sll16">;
 class SRL16_MMR6_DESC : ShiftIMM16<"srl16", uimm3_shift, GPRMM16Opnd, II_SRL>,


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