[PATCH] D17319: [NVPTX] Test that MachineSink won't sink across llvm.cuda.syncthreads.

[Justin Lebar via llvm-commits]

jlebar created this revision.
jlebar added a reviewer: jingyue.
jlebar added a subscriber: llvm-commits.
Herald added a subscriber: jholewinski.

The syncthreads MI is modeled as mayread/maywrite -- convergence doesn't
even come into play here.  Nonetheless this property is highly implicit
in the tablegen files, so a test seems appropriate.

http://reviews.llvm.org/D17319

Files:
  test/CodeGen/NVPTX/MachineSink-convergent.ll

Index: test/CodeGen/NVPTX/MachineSink-convergent.ll
===================================================================
--- /dev/null
+++ test/CodeGen/NVPTX/MachineSink-convergent.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s | FileCheck %s
+target triple = "nvptx64-nvidia-cuda"
+
+declare void @llvm.cuda.syncthreads()
+
+; Load a value, then syncthreads.  Branch, and use the loaded value only on one
+; side of the branch.  The load shouldn't be sunk beneath the call, because
+; syncthreads is modeled as maystore.
+define i32 @f(i32 %x, i32* %ptr, i1 %cond) {
+Start:
+  ; CHECK: ld.u32
+  %ptr_val = load i32, i32* %ptr
+  ; CHECK: bar.sync
+  call void @llvm.cuda.syncthreads()
+  br i1 %cond, label %L1, label %L2
+L1:
+  %ptr_val2 = add i32 %ptr_val, 100
+  br label %L2
+L2:
+  %v4 = phi i32 [ %x, %Start ], [ %ptr_val2, %L1 ]
+  %v5 = add i32 %v4, 1000
+  ret i32 %v5
+}


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