[PATCH] D17277: AMDGPU/SI: add llvm.amdgcn.buffer.load/store.format intrinsics

[Matt Arsenault via llvm-commits]

arsenm added inline comments.

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Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:183-190
@@ +182,10 @@
+  [llvm_v4f32_ty],
+  [llvm_v4i32_ty,     // rsrc(SGPR)
+   llvm_i32_ty,       // soffset(SGPR)
+   llvm_i32_ty,       // offset(imm)
+   llvm_i32_ty,       // vindex(VGPR)
+   llvm_i32_ty,       // voffset(VGPR)
+   llvm_i1_ty,        // glc(imm)
+   llvm_i1_ty,        // slc(imm)
+   llvm_i1_ty],       // tfe(imm)
+  [IntrReadMem]>;
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I don't think it makes sense to directly expose all fields. TFE for example changes the register class of the result. The address fields also seem like they shouldn't be directly exposed and should use normal looking addressing mode matching.

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Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:204
@@ +203,3 @@
+   llvm_i1_ty],       // tfe(imm)
+  [IntrReadWriteArgMem]>;
+
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I think this will break because the intrinsic doesn't have any pointer arguments


http://reviews.llvm.org/D17277