[PATCH] D17211: Consider regmasks when computing register-based DBG_VALUE live ranges

[Adrian Prantl via llvm-commits]

aprantl added a comment.

Couple of high-level comments; still need to look at the actual changes.


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Comment at: test/DebugInfo/MIR/X86/live-debug-values.mir:37
@@ -36,3 +37,1 @@
-# CHECK:      DBG_VALUE debug-use %rsi, debug-use _, !13, !20, debug-location !22
-# CHECK-NEXT: DBG_VALUE debug-use %ebx, debug-use _, !14, !20, debug-location !33
 
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Could you explain this change?
Was the original just wrong, or is there a different DBG_VALUE to check for now?

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Comment at: test/DebugInfo/X86/dbg-value-regmask-clobber.ll:3
@@ +2,3 @@
+; RUN: llc < %s -filetype=obj | llvm-dwarfdump - | FileCheck %s --check-prefix=DWARF
+
+; Values in registers should be clobbered by calls, which use a regmask instead
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We should consider rewriting this as a MIR testcase (http://llvm.org/docs/MIRLangRef.html).
(It might be easier to understand the testcase if we can see the DBG_VALUEs that are the input for DbgValueHistoryCalulator.)

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Comment at: test/DebugInfo/X86/dbg-value-regmask-clobber.ll:70
@@ +69,3 @@
+
+attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
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We often strip all irrelevant attributes (~everything in quotes) from testcases.


http://reviews.llvm.org/D17211