[PATCH] D17181: [X86] Don't turn (c?-v:v) into (c?-v:0) by blindly using PSIGN.
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 15 16:07:24 PST 2016
spatel added inline comments.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:26481-26484
@@ +26480,6 @@
+ // ( M ? -X : X) == ((X ^ M ) + (M & 1))
+ // This lets us transform our vselect to:
+ // (add (xor X, M), (and M, 1))
+ // And further to:
+ // (add (xor X, M), (srl M, EltBits-1))
+ Mask = DAG.getNode(
----------------
Double-check me to make sure, but we can do one better I think:
((X ^ M) + (M & 1))
((X ^ M) - (M)) <--- since we know that M is all 1s (ie, -1), change the 'add 1' to 'sub -1'
http://reviews.llvm.org/D17181
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