[PATCH] D17221: Don't combine fp_round (fp_round x) if f80 to f16 is generated

[Ahmed Bougacha via llvm-commits]

ab accepted this revision.
ab added a comment.
This revision is now accepted and ready to land.

LGTM


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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:9030
@@ +9029,3 @@
+    // x86.
+    if (N0.getOperand(0).getValueType() == MVT::f80 && VT == MVT::f16)
+      return SDValue();
----------------
pirama wrote:
> ab wrote:
> > How do we know that the round is value-preserving?
> The first round being value-preserving is a pre-requisite for the folding (the if statement below).  So, this patch doesn't change behavior if the first fp_round is not value-preserving.
Ah, you're right; I misread that, sorry.

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Comment at: test/CodeGen/X86/half.ll:270
@@ +269,3 @@
+; fp_round and the subsequent fptrunc from float to half.
+define half @test_f80trunc_nodagcombine() #0 {
+; CHECK-LABEL: test_f80trunc_nodagcombine:
----------------
What do you think of explicitly testing f80->f16 instead?


http://reviews.llvm.org/D17221