[PATCH] D17222: LegalizeDAG: Don't replace vector load with integer unless legal

[Matt Arsenault via llvm-commits]

arsenm created this revision.
arsenm added a subscriber: llvm-commits.

On AMDGPU we want to be able to promote i64/f64 loads to v2i32.
If the access is unaligned, this would conclude that since i64 is legal,
it would convert it back to i64 and there is an endless legalization
loop.
    
Extract the logic for scalarizing the load into a new TargetLowering
function, where this can also replace the custom function AMDGPU
has for this.

http://reviews.llvm.org/D17222

Files:
  include/llvm/Target/TargetLowering.h
  lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  lib/CodeGen/SelectionDAG/TargetLowering.cpp

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D17222.47870.patch
Type: text/x-patch
Size: 6403 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160212/5bdee06d/attachment.bin>