[PATCH] D17160: AMDGPU/SI: Add llvm.amdgcn.mov.dpp intrinsic

[Matt Arsenault via llvm-commits]

arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.

LGTM with the test fixed


================
Comment at: lib/Target/AMDGPU/VIInstructions.td:115-121
@@ +114,9 @@
+//===----------------------------------------------------------------------===//
+
+def : Pat <
+  (int_amdgcn_mov_dpp i32:$src, imm:$dpp_ctrl, imm:$bound_ctrl,
+                      imm:$bank_mask, imm:$row_mask),
+  (V_MOV_B32_dpp $src, (as_i32imm $dpp_ctrl), (as_i1imm $bound_ctrl),
+                       (as_i32imm $bank_mask), (as_i32imm $row_mask))
+>;
+
----------------
Is there a reason this needs to be a standalone pattern?

================
Comment at: test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll:11-13
@@ +10,4 @@
+
+declare i32 @llvm.amdgcn.mov.dpp.i32(i32, i32, i1, i32, i32) #0
+
+attributes #0 = { nounwind readnone }
----------------
Attributes in test are wrong


http://reviews.llvm.org/D17160