[PATCH] D17205: DAGCombiner: Turn truncate of a bitcasted vector to an extract

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 12 10:28:56 PST 2016


arsenm created this revision.
arsenm added a subscriber: llvm-commits.
Herald added a reviewer: tstellarAMD.

On AMDGPU where operations i64 operations are often bitcasted to v2i32
and back, this pattern shows up regularly where it breaks some
expected combines on i64, such as load width reducing.
    
This fixes some test failures in a future commit when i64 loads
are changed to promote.

http://reviews.llvm.org/D17205

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/AMDGPU/half.ll
  test/CodeGen/AMDGPU/trunc-bitcast-vector.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D17205.47818.patch
Type: text/x-patch
Size: 5209 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160212/6431f1dc/attachment.bin>


More information about the llvm-commits mailing list