[llvm] r260644 - AMDGPU: Remove trailing whitespace

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Thu Feb 11 20:16:07 2016
New Revision: 260644

URL: http://llvm.org/viewvc/llvm-project?rev=260644&view=rev
Log:
AMDGPU: Remove trailing whitespace

Modified:
    llvm/trunk/lib/Target/AMDGPU/SILowerControlFlow.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/SILowerControlFlow.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SILowerControlFlow.cpp?rev=260644&r1=260643&r2=260644&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SILowerControlFlow.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SILowerControlFlow.cpp Thu Feb 11 20:16:07 2016
@@ -223,7 +223,7 @@ void SILowerControlFlowPass::Break(Machi
 
   unsigned Dst = MI.getOperand(0).getReg();
   unsigned Src = MI.getOperand(1).getReg();
- 
+
   BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst)
           .addReg(AMDGPU::EXEC)
           .addReg(Src);
@@ -238,7 +238,7 @@ void SILowerControlFlowPass::IfBreak(Mac
   unsigned Dst = MI.getOperand(0).getReg();
   unsigned Vcc = MI.getOperand(1).getReg();
   unsigned Src = MI.getOperand(2).getReg();
- 
+
   BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst)
           .addReg(Vcc)
           .addReg(Src);
@@ -253,7 +253,7 @@ void SILowerControlFlowPass::ElseBreak(M
   unsigned Dst = MI.getOperand(0).getReg();
   unsigned Saved = MI.getOperand(1).getReg();
   unsigned Src = MI.getOperand(2).getReg();
- 
+
   BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst)
           .addReg(Saved)
           .addReg(Src);
@@ -455,7 +455,7 @@ void SILowerControlFlowPass::IndirectDst
 
   computeIndirectRegAndOffset(Dst, Reg, Off);
 
-  MachineInstr *MovRel = 
+  MachineInstr *MovRel =
     BuildMI(*MBB.getParent(), DL, TII->get(AMDGPU::V_MOVRELD_B32_e32))
             .addReg(Reg, RegState::Define)
             .addReg(Val)